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Wei‐Sheng Yun

Observed names: Wei Sheng Yun, Wei-Sheng Yun
ORCID: 0009-0009-9309-9188
Observed ORCID: 0009-0009-9309-9188
OpenAlex ID: A5000124239
First Demonstration of GAA Monolayer-MoS2 Nanosheet nFET with 410μA μ m ID 1V VD at 40nm gate length
2022 · Yun-Yan Chung, Bo-Jhih Chou, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 86
Nearly Ideal Subthreshold Swing in Monolayer MoS₂ Top-Gate nFETs with Scaled EOT of 1 nm
2022 · Tsung-En Lee, Yuan-Chun Su, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 32
Monolayer-MoS 2 Stacked Nanosheet Channel with C-type Metal Contact
2023 · Yun-Yan Chung, Wei-Sheng Yun, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 29
Status and Performance of Integration Modules Toward Scaled CMOS with Transition Metal Dichalcogenide Channel
2023 · Ang-Sheng Chou, Ching-Hao Hsu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 27
High-performance monolayer MoS2 nanosheet GAA transistor
2023 · Bo-Jhih Chou, Yun-Yan Chung, et al. · Nanotechnology · 23
pMOSFET with CVD-grown 2D semiconductor channel enabled by ultra-thin and fab-compatible spacer doping
2022 · Terry Y.T. Hung, Meng-Zhan Li, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 23
Top-Gated P-MOSFET with CVD-Grown WSe2 Channels via Self-Aligned WOx Conversion for Spacer Doping
2025 · Meng-Zhan Li, Terry Y. T. Hung, et al. · Nano Letters · 18
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Stacked Channel Transistors with 2D Materials: An Integration Perspective
2024 · Yun-Yan Chung, Bo-Jhih Chou, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 13
High-Endurance MoS2 FeFET with Operating Voltage Fess Than IV for eNVM in Scaled CMOS Technologies
2023 · Tsung-En Lee, Hung-Li Chiang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 13
Self‐Aligned Contact Doping for Performance Enhancement of Low‐Leakage Carbon Nanotube Field Effect Transistors
2023 · Hsin‐Yuan Chiu, Tzu‐Ang Chao, et al. · Advanced Electronic Materials · 12
Performance Step-Up in PMOS with Monolayer WSe 2 Channel
2025 · Ang-Sheng Chou, Yu-Tung Lin, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 6
Enhanced Interlayer Coupling in Few-Layer MoS2 via Stacking of CVD-Grown Monolayers
2025 · Bo-Jhih Chou, Yu-I Chang, et al. · ACS Applied Engineering Materials · 4
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Bismuth Confinement: A Strategy for Low Resistance and Good Thermal Endurance of Integrated Contacts to MoS 2
2026 · Wen-Chia Wu, Terry Y. T. Hung, et al. · ACS Nano · 3
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Mechanics of Integration and Component Performance Step-up for Nanosheet Transistors with Ultrathin 2D Channel
2025 · Terry Y.T. Hung, Shu-Jui Chang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 2
Scaling $V_{DD}$ for P-Type 2D-Material Channel Transistor: what Non-Idealities are Still to be Solved
2026 · Chao-Ching Cheng, Ang-Sheng Chou, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
Prospects and Challenges for Two-Dimensional Transition Metal Dichalcogenide Based Logic Devices
2026 · Terry Y.T. Hung, Shu-Jui Chang, et al. · IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
Contact Optimization Through Annealing and Edge Functionalization Towards 2D TMD Nanosheet Devices
2024 · Meng-Zhan Li, Terry Y.T. Hung, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)
不含離子非水溶液之電動力學行為; Electrokinetics in Salt-Free Non-aqueous Solution
2010 · 雲惟勝, Wei‐Sheng Yun
Works count: 18
Citation count: 291
H-index: 10
I10-index: 10
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