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Pau Fontova-Musté

Observed names: Fontova Musté, Pau, Pau Fontova, Pau Fontova Musté, Pau Fontova-Muste
ORCID: 0000-0003-1839-416X
Observed ORCID: 0000-0003-1839-416X
OpenAlex ID: A5000595364
An Energy-Efficient GeMM-Based Convolution Accelerator With On-the-Fly im2col
2023 · Jordi Fornt, Pau Fontova-Musté, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 21
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Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI
2022 · Victor Soria-Pardos, Max Doblas, et al. · Euromicro Conference on Digital System Design (DSD) · 17
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GMX: Instruction Set Extensions for Fast, Scalable, and Efficient Genome Sequence Alignment
2023 · Max Doblas, Oscar Lostes-Cazorla, et al. · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · 11
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An automotive case study on the limits of approximation for object detection
2023 · Martí Caro, Hamid Tabani, et al. · Journal of Systems Architecture · 7
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DVINO: A RISC-V Vector Processor Implemented in 65nm Technology
2022 · Guillem Cabo, Gerard Candón, et al. · 7
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Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation
2024 · Jordi Fornt, Enrico Reggiani, et al. · IEEE Transactions on Computers · 4
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A low-cost development platform to design digital circuits on FPGAs using open-source software and hardware tools
2020 · Albert Saiz-Vela, Pau Fontova, et al. · 4
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology
2023 · Max Doblas, Gerard Candón, et al. · Conference on Design of Circuits and Integrated Systems · 2
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Energy Efficient Object Detection for Automotive Applications with YOLOv3 and Approximate Hardware
2023 · Jordi Fornt, Pau Fontova-Musté, et al. · IEEE International Conference on Nanotechnology (IEEE-NANO) · 1
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Two examples of approximate arithmetic to reduce hardware complexity and power consumption
2022 · Jordi Fornt, Leixin Jin, et al. · 1
Approximate Circuits Versus Quantization for Energy Efficient Deep Neural Networks
2025 · Jordi Fornt, Pau Fontova-Musté, et al. · Conference on Design of Circuits and Integrated Systems
GAVINA: flexible aggressive undervolting for bit-serial mixed-precision DNN acceleration
2025 · Jordi Fornt, Pau Fontova-Musté, et al. · IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
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Design for Testability methodologies applied to a RISC-Vprocessor
2021 · Pau Fontova Musté
Works count: 15
Citation count: 75
H-index: 5
I10-index: 3
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