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Kiritkumar Bhatt

Observed names: K. Bhatt, Kiritkumar Ramanbhai Bhatt
ORCID: 0000-0001-9850-5506
Observed ORCID: 0000-0001-9850-5506
OpenAlex ID: A5001714562
A review paper on conical corrugated horn antenna
2016 · Niraj Tevar, Prarthan Mehta, et al. · International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) · 8
Meta-heuristic Algorithm Based Precoding in Massive MIMO
2019 · Saurabh Manilal Patel, Kiritkumar Ramanbhai Bhatt · Wireless Personal Communications · 4
Illumination Condition Effect on Object Tracking: A Review
2014 · Kalpesh R Ranipa, Kiritkumar Bhatt · Global Journal of Computer Science and Technology · 4
A Review on Implementation of QAM on FPGA
2015 · Ravindra H. Sharma, Kiritkumar Bhatt · International Journal of Innovative Research in Computer and Communication Engineering · 3
Bio-inspired power optimization strategies for low-power VLSI in IoT and wearable devices: a comprehensive review
2026 · Ashish Pasaya, Sarman Hadia, et al. · Discover Electronics · 2
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Power-Efficient 8-Bit ALU Design Using Squirrel Search and Swarm Intelligence Algorithms
2025 · Ashish Pasaya, Sarman Hadia, et al. · Journal of Electronics Electromedical Engineering and Medical Informatics · 2
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Power Optimized Embedded Processor Design with Parallel Pipelining
2012 · Kiritkumar Bhatt, Saurabh M. Patel, et al. · CiiT international journal of programmable device circuits and systems · 2
Power Estimation of Switching Activity for Low – Power Implementation on FPGA
2011 · Kiritkumar Bhatt, Aditya Trivedi · CiiT international journal of programmable device circuits and systems · 2
The Efficient Scheme for Contention Reduction in Bufferless OBS Network
2017 · Dilip H. Patel, Kiritkumar Bhatt, et al. · Advances in intelligent systems and computing · 1
Implementing VGA Application on FPGA using an Innovative Algorithm with the help of NIOS-II
2012 · Ashish B. Pasaya, Kiritkumar Bhatt, et al. · 1
Power Computation Model of CMOS Based FPGA Used for Power Optimization
2011 · Kiritkumar Bhatt, Aditya Trivedi · CiiT international journal of programmable device circuits and systems · 1
Power-Efficient 16-Bit ALU Design Leveraging Reset and Tri-state Logic for Embedded Systems
2026 · Ashish Pasaya, Sarman Hadia, et al. · Lecture notes in electrical engineering
A Novel Hybrid Scheme for Contention Minimization in Optical Burst Switched Network
2015 · Dilip H. Patel, Kiritkumar Bhatt, et al. · ICTACT Journal on Communication Technology
Memory access stage removal technique for dynamic power reduction in embedded CPUs
2013 · K. Bhatt, A. I. Trivedi · International Conference on Intelligent Systems and Signal Processing (ISSP)
Integration of dynamic power management strategies for system level power optimization low power design with its formal verification and implementation
2012 · Kiritkumar Bhatt · University
Implementation of Resource Sharing Strategy for Power Optimization in Embedded Processors
2012 · Kiritkumar Bhatt, Aditya Trivedi · Computer Engineering and Intelligent Systems
Works count: 16
Citation count: 30
H-index: 3
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