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Mark Wijtvliet
Observed names:
M. Wijtvliet,
Wijtvliet Mark,
Wijtvliet, Mark
Institution:
ASM Pacific Technology (China)
Observed institutions:
Indian Institute of Technology Kharagpur,
Singapore University of Technology and Design,
ASM Pacific Technology (China),
Technische Universität Dresden,
Eindhoven University of Technology
ORCID:
0000-0002-4907-2334
Observed ORCID:
0000-0002-4907-2334
OpenAlex ID:
A5003677982
Coarse grained reconfigurable architectures in the past 25 years: Overview and classification
2016
·
Mark Wijtvliet
, Luc Waeijen
, et al.
·
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation
·
109
SFU-Driven Transparent Approximation Acceleration on GPUs
2016
·
Ang Li
, Shuaiwen Leon Song
, et al.
·
International Conference on Supercomputing
·
36
PDF
RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency
2022
·
Zahra Ebrahimi
, Muhammad Zaid
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
34
PDF
Conclusions and Future Work
2021
·
Mark Wijtvliet
, Henk Corporaal
, et al.
·
Springer eBooks
·
29
R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA
2024
·
Barry de Bruin
, Kanishkan Vadivel
, et al.
·
ACM Transactions on Reconfigurable Technology and Systems
·
21
PDF
ENTANGLE: An Enhanced Logic-locking Technique for Thwarting SAT and Structural Attacks
2022
·
Armin Darjani
, Nima Kavand
, et al.
·
ACM Great Lakes Symposium on VLSI (GLSVLSI)
·
15
CGRA-EAM—Rapid Energy and Area Estimation for Coarse-grained Reconfigurable Architectures
2021
·
Mark Wijtvliet
, Henk Corporaal
, et al.
·
ACM Transactions on Reconfigurable Technology and Systems
·
14
PDF
Blocks: Redesigning Coarse Grained Reconfigurable Architectures for Energy Efficiency
2019
·
Mark Wijtvliet
, Jos Huisken
, et al.
·
International Conference on Field Programmable Logic and Applications (FPL)
·
13
Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture
2021
·
M. Wijtvliet
, A. Kumar
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
12
PDF
(AS)2: Accelerator Synthesis using Algorithmic Skeletons for Rapid Design Space Exploration
2015
·
Shakith Fernando
, Mark Wijtvliet
, et al.
·
Design, Automation, and Test in Europe
·
8
PDF
DELTA: DEsigning a stealthy trigger mechanism for analog hardware trojans and its detection analysis
2022
·
Nishant Gupta
, Mohil Sandip Desai
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
6
Loop Overhead Reduction Techniques for Coarse Grained Reconfigurable Architectures
2017
·
Kanishkan Vadivel
, Mark Wijtvliet
, et al.
·
Euromicro Conference on Digital System Design (DSD)
·
6
Design and evaluation of a radio-interferometry antenna for the REXUS 25 sounding rocket
2020
·
I.S. Jansen
, R. Maximidis
, et al.
·
European Conference on Antennas and Propagation
·
5
Multi-granular Arithmetic in a Coarse-Grain Reconfigurable Architecture
2016
·
Stef Louwers
, Luc Waeijen
, et al.
·
Euromicro Conference on Digital System Design (DSD)
·
5
Blocks, Towards Energy-efficient, Coarse-grained Reconfigurable Architectures
2021
·
Mark Wijtvliet
, Henk Corporaal
, et al.
·
Springer eBooks
·
4
Code Generation for Reconfigurable Explicit Datapath Architectures with LLVM
2016
·
Michael Adriaansen
, Mark Wijtvliet
, et al.
·
Euromicro Conference on Digital System Design (DSD)
·
4
CGRA Background and Related Work
2021
·
Mark Wijtvliet
, Henk Corporaal
, et al.
·
Springer eBooks
·
3
PR3: A system For radio-interferometry and radiation measurement on sounding rockets
2020
·
Mark Wijtvliet
, Bjarni Pont
, et al.
·
Microprocessors and Microsystems
·
3
PDF
REXUS-25 Rocket Flight of a CubeSat Cosmic-Ray Detector
2019
·
Bjarni Pont
, Jochem Beurskens
, et al.
·
International Cosmic Ray Conference
·
3
PDF
SPINE: From C loop-nests to highly efficient accelerators using Algorithmic Species
2015
·
Mark Wijtvliet
, Shakith Fernando
, et al.
·
International Conference on Field Programmable Logic and Applications (FPL)
·
3
ELVSR: An efficient and lightweight convolutional neural network for FPGA-based FHD to UHD video super-resolution
2025
·
Amirhossein Sadough
, Mahyar Shahsavari
, et al.
·
Array
·
2
Reaching intrinsic compute efficiency requires adaptable micro-architectures
2016
·
Mark Wijtvliet
, Ljw Luc Waeijen
, et al.
·
TU/e Research Portal
·
1
MAMPSX: A demonstration of rapid, predictable HMPSOC synthesis
2013
·
Shakith Fernando
, Mark Wijtvliet
, et al.
·
International Conference on Field Programmable Logic and Applications (FPL)
·
1
ADAD: An Energy-Efficient Hardware Solution for Real-Time Anomaly Detection Using Extended Decorrelation-Based Method
2026
·
Amirhossein Sadough
, Mahyar Shahsavari
, et al.
·
IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Real-Time Decorrelation-Based Anomaly Detection for Multivariate Time Series
2025
·
Sadough, Amirhossein
, Shahsavari, Mahyar
, et al.
·
arXiv (Cornell University)
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Works count:
46
Citation count:
337
H-index:
9
I10-index:
9
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