Author

Mikael Detalle

Observed name: Mikaël Detalle

Institution: IMEC

Observed institutions: IMEC, Université Lille 1

OpenAlex ID: A5004278657

Ultra-Fine Pitch 3D Integration Using Face-to-Face Hybrid Wafer Bonding Combined with a Via-Middle Through-Silicon-Via Process

2016 · Soon-Wook Kim, Mikael Detalle, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 59

Interposer technology for high band width interconnect applications

2013 · Mikael Detalle, A. La Manna, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 27

Minimizing interposer warpage by process control and design optimization

2014 · Mikael Detalle, B. Vandevelde, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 16

Comparative study of 3D stacked IC and 3D interposer integration: Processing and assembly challenges

2014 · Joeri De Vos, Vladimir Cherman, et al. · IEEE International D Systems Integration Conference · 11

A $16\times16$ Non-Volatile Silicon Photonic Switch Circuit

2018 · Herbert D'Heer, Kumar Saurav, et al. · IEEE Photonics Technology Letters · 7

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Technology optimization for high bandwidth density applications on 3D interposer

2016 · Nicolas Pantano, Cesar Roda Neve, et al. · Electronic System-Integration Technology Conference (ESTC) · 7

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Cost components for 3D system integration

2014 · Dimitrios Velenis, Mikael Detalle, et al. · Electronic System-Integration Technology Conference (ESTC) · 7

Si interposer build-up options and impact on 3D system cost

2013 · Dimitrios Velenis, Mikael Detalle, et al. · IEEE International D Systems Integration Conference · 7

Cost comparison between 3D and 2.5D integration

2012 · Dimitrios Velenis, Mikael Detalle, et al. · Electronic System-Integration Technology Conference (ESTC) · 7

Material technology for 2.5D/3D package

2015 · Kazuyuki Mitsukura, Tatsuya Makino, et al. · IEEE CPMT Symposium Japan (ICSJ) · 6

ESD protection design in active-lite interposer for 2.5 and 3D systems-in-package

2015 · Mirko Scholz, Geert Hellings, et al. · Electrical Overstress/Electrostatic Discharge Symposium · 6

Packaging Material Evaluation for 2.5D/3D TSV Application

2016 · Kazuyuki Mitsukura, Tatsuya Makino, et al. · Transactions of The Japan Institute of Electronics Packaging · 2

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Stress and bowing engineering in passive silicon interposer

2015 · Mikael Detalle, B. Vandevelde, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 1

ESD protection design in smart interposer

2015 · Mirko Scholz, Geert Hellings, et al. · 1

Photosensitive insulation coating for a copper redistribution layer process

2014 · Hiroshi Matsutani, Kazuyuki Mitsukura, et al. · IEEE CPMT Symposium Japan (ICSJ) · 1

A calibrated pathfinding model for signal integrity analysis on interposer

2012 · Jaemin Kim, Sunyoung Kim, et al. · Custom Integrated Circuits Conference · 1

CMOS Compatible Anodization Process for Low Cost High Density Capacitors

2010 · Mikael Detalle, Michal Rakowski, et al. · ECS Transactions

CMOS Compatible Anodization Process for Low Cost High Density Capacitors

2010 · Mikael Detalle, Michal Rakowski, et al. · ECS Meeting Abstracts

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Élaboration et caractérisations de films ferroélectriques relaxeurs de PMN-PT : intégration sur silicium et applications MEMS

2008 · Mikaël Detalle

Works count: 19

Citation count: 166

H-index: 7

I10-index: 4