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Seon‐Ho Han

Observed names: Han, S.T. Han, Seon-Ho Han
ORCID: 0000-0002-2432-0020
Observed ORCID: 0000-0002-2432-0020
OpenAlex ID: A5004453735
An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/a converter
2004 · Byung-Do Yang, J.-H. Choi, et al. · IEEE Journal of Solid-State Circuits · 94
A CMOS IF transceiver with 90 dB linear control VGA for IMT-2000 application
2004 · Yonk-Sik Youn, Jang-Hong Choi, et al. · Symposium on VLSI Circuits · 20
A 7.1-GB/s low-power rendering engine in 2-D array-embedded memory logic CMOS for portable multimedia system
2001 · Yong-Ha Park, Seon-Ho Han, et al. · IEEE Journal of Solid-State Circuits · 19
A Low-Power Interference-Tolerance Wideband Receiver for 802.11af/ah Long-Range Wi-Fi With Post-LNA Active $N$ -Path Filter
2018 · Hoai-Nam Nguyen, Ki-Su Kim, et al. · IEEE Transactions on Microwave Theory and Techniques · 18
A 7.1 GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS
2002 · Yong-Ha Park, Seon-Ho Han, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 10
A direct digital frequency synthesizer using a new ROM compression method
2001 · Byung‐Do Yang, Ki-Hyuk Sung, et al. · European Solid-State Circuits Conference (ESSCIRC) · 8
A 330 MHz low-jitter and fast-locking direct skew compensation DLL
2002 · Joo-Ho Lee, Seon-Ho Han, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 5
8.2‐GHz band radar RFICs for an 8 × 8 phased‐array FMCW receiver developed with 65‐nm CMOS technology
2020 · Seon‐Ho Han, Bon‐Tae Koo · ETRI Journal · 4
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Prescaler using complementary clocking dynamic flip-flop
2003 · Seon-Ho Han, Yong-Sik Youn, et al. · Electronics Letters · 4
Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification
2001 · Yong-Ha Park, Seon-Ho Han, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 3
A low power and low noise frequency synthesizer with a integrated quadrature VCO
2003 · Seon-Ho Han, Yong-Sik Youn, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 2
A VPM (Virtual Pipelined Memory) architecture for a fast row-cycle DRAM
2003 · Chi-Weon Yoon, Yon-Kyun Im, et al. · AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) · 2
Fast lock-on time mixed mode DLL with 10 ps jitter
1999 · Han, Lee, et al. · Electronics Letters · 2
6.1 A Compact Ring Delay Line for High Speed Synchronous DRAM
1998 · Seong-Jin Jang, Seon‐Ho Han, et al. · 2
10‐GHz band 2 × 2 phased‐array radio frequency receiver with 8‐bit linear phase control and 15‐dB gain control range using 65‐nm complementary metal–oxide–semiconductor technology
2023 · Seon‐Ho Han, Bon‐Tae Koo · ETRI Journal · 1
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A Design Study of 100㎓ Band Local Oscillator System by Using Yig Oscillator
2003 · Chang-Hoon Lee, K.D. Kim, et al. · Journal of Astronomy and Space Sciences · 1
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A fast synchronous pipelined DRAM (SP-DRAM) architecture with SRAM buffers
2003 · Chi-Weon Yoon, Yon-Kyun Im, et al. · International Conference on VLSI and CAD · 1
A fast lock-on time mixed mode DLL with 10 ps jitter
2003 · Seon-Ho Han, Joo-Ho Lee, et al. · International Conference on VLSI and CAD · 1
Design of a Distributed FMCW Radar System Using Radiative Wireless LO Distribution
2026 · Jae-Woo Park, Eunsung Jang, et al. · IEEE Internet of Things Journal
125‐GHz‐band RF receiver front end using 40 nm complementary metal–oxide–semiconductor technology
2025 · Seon‐Ho Han, Dong‐Woo Kang, et al. · ETRI Journal
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X‐band 8 × 8 phased‐array 4‐channel FMCW receiver in 65 nm CMOS technology
2021 · Seon‐Ho Han, Ki‐Su Kim, et al. · Electronics Letters
A 41dB Gain Control Range 6th-Order Band-Pass Receiver Front-End Using CMOS Switched FTI
2016 · Seon-Ho Han, Hoai-Nam Nguyen, et al. · JSTS Journal of Semiconductor Technology and Science
과거드럼 척도인자 적용을 위한 잡고체폐기물 방사능 분석
2010 · Gi-Du Gang, Jong‐Gil Park, et al. · Proceedings of the Korean Radioactive Waste Society Conference
방사성폐기물 시료 내 핵종분석 방법의 측정불확도 산출 및 평가
2006 · Se-Cheol Son, Hong-Ju An, et al. · Proceedings of the Korean Radioactive Waste Society Conference
A fully integrated receiver front-end reconfigured by PLL
2005 · Seon-Ho Han, Cheon-Soo Kim, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium
Works count: 28
Citation count: 197
H-index: 6
I10-index: 5
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