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Nisha Yadav

ORCID: 0000-0001-8860-3831
Observed ORCID: 0000-0001-8860-3831
OpenAlex ID: A5004915173
Geometrical Variability Impact on the Performance of Sub - 3 nm Gate-All-Around Stacked Nanosheet FET
2022 · Nisha Yadav, Sunil Jadav, et al. · Silicon · 15
Impact of Gate Length and Doping Variation on the DC and Analog/RF Performance of sub - 3nm Stacked Si Gate-All-Around Nanosheet FET
2022 · Nisha Yadav, Sunil Jadav, et al. · Silicon · 11
Steep subthreshold swing Double - Gate tunnel FET using source pocket engineering: Design guidelines
2024 · Nisha Yadav, Sunil Jadav, et al. · Micro and Nanostructures · 9
DC and Analog/RF Performance Analysis of Multi-Bridge Channel FET with Variation in Gate Work Function
2022 · Nisha Yadav, Sunil Jadav, et al. · International Conference for Advancement in Technology (ICONAT) · 4
Linearity performance and harmonic distortion analysis of gate-over-pockets hetero-dielectric dual-metal-double-gate TFET for RF applications
2025 · Nisha Yadav, Sunil Jadav, et al. · Micro and Nanostructures · 3
A Review on Role of Epitaxial Engineering in Improving the Drive Current and Subthreshold Swing in Area Scaled Tunnel FETs
2023 · Nisha Yadav, Sunil Jadav, et al. · International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3) · 3
The Tunnel FET
2025 · Nisha Yadav, Sunil Jadav, et al. · Wiley eBooks · 2
2-D Analytical Surface Potential Modeling and Simulation-Based Optimization of GoP-HD-DMDG-TFET for Enhanced Performance
2025 · Nisha Yadav, Sunil Jadav, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1
Performance enhancement of junctionless Ge-channel NCFET using ferroelectric spacers for low-power applications
2026 · Tusshar Govind, Nisha Yadav, et al. · Micro and Nanostructures
Works count: 9
Citation count: 48
H-index: 4
I10-index: 2
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