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Yuanyuan Han
Observed names:
Han, Yuanyuan,
Y.-P. Han
Institutions:
Shanghai Zhangjiang Laboratory,
Zhangjiang Laboratory
Observed institutions:
Fudan University,
Shanghai Zhangjiang Laboratory,
Third Xiangya Hospital,
State Key Laboratory of ASIC and System,
Zhangjiang Laboratory
ORCID:
0000-0001-7043-5390
Observed ORCIDs:
0000-0001-7043-5390,
0009-0005-0243-3584
OpenAlex ID:
A5005420474
Radiation Hardened 12T SRAM With Crossbar-Based Peripheral Circuit in 28nm CMOS Technology
2021
·
Yuanyuan Han
, Tongde Li
, et al.
·
IEEE Transactions on Circuits and Systems I Regular Papers
·
21
Radiation-Hardened 0.3–0.9-V Voltage-Scalable 14T SRAM and Peripheral Circuit in 28-nm Technology for Space Applications
2020
·
Yuanyuan Han
, Xu Cheng
, et al.
·
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
·
21
Establishment and application of the BRP prognosis model for idiopathic pulmonary fibrosis
2023
·
Xiaoyun Cheng
, Zhichao Feng
, et al.
·
Journal of Translational Medicine
·
8
PDF
A Multi-objective Optimization Framework to Design Soft-Error-Immune Circuit
2019
·
Yan Li
, Jun Han
, et al.
·
European Conference on Radiation and Its Effects on Components and Systems
·
7
A 0.8- mu m CMOS technology for high-performance ASIC memory and channelless gate array
1989
·
F.-T. Liou
, Y.-P. Han
, et al.
·
IEEE Journal of Solid-State Circuits
·
5
A SET‐tolerant StrongARM comparator with improved performance
2024
·
Chentian Zhou
, Yuanyuan Han
, et al.
·
Electronics Letters
·
1
PDF
A 28-nm Soft Error Tolerant SRAM With Design-Layout Co-Optimized 14T Cell and Double Mode Redundant Peripheral Circuit for Space Application
2026
·
Xu Luo
, Yuanyuan Han
, et al.
·
IEEE Transactions on Circuits and Systems I Regular Papers
An RRAM-Based Compute-in-Memory Ising Machine With Application-Adaptive Reconfigurable Topology and Precision
2026
·
Jingxin Deng
, Chengshuo Yu
, et al.
·
IEEE Transactions on Circuits and Systems I Regular Papers
Penta Interlocking Dual Ports 14T SRAM with Inside-Bit interleaving Layout Isolation for Soft Error Recovery
2025
·
Xu Luo
, Yuanyuan Han
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
SET Tolerable SRAM Hardened by DMR Circuit With Feedback-Split-Gate Voter and High-Speed Hierarchical Structure
2023
·
Yuanyuan Han
, Xu Cheng
, et al.
·
IEEE Transactions on Circuits & Systems II Express Briefs
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Works count:
11
Citation count:
63
H-index:
5
I10-index:
2
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