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Simon M. Louwsma

Observed names: Louwsma, Simon M., S.M. Louwsma, Simon Louwsma
Institution: Dalsa Corporation
ORCID: 0009-0006-8366-4073
Observed ORCID: 0009-0006-8366-4073
OpenAlex ID: A5006216009
A CMOS switched transconductor mixer
2004 · E.A.M. Klumperink, S.M. Louwsma, et al. · IEEE Journal of Solid-State Circuits · 157
A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS
2008 · Simon M. Louwsma, A. J. M. van Tuijl, et al. · IEEE Journal of Solid-State Circuits · 139
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A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator
2019 · Harijot Singh Bindra, Anne-Johan Annema, et al. · Symposium on VLSI Circuits · 32
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A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply
2019 · Harijot Singh Bindra, Anne-Johan Annema, et al. · Custom Integrated Circuits Conference · 28
A 1.35 GS/s, 10b, 175 mW Time-Interleaved AD Converter in 0.13 ¿m CMOS
2007 · Simon M. Louwsma, J.M. van Tuijl, et al. · Symposium on VLSI Circuits · 27
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Time-interleaved Analog-to-Digital Converters
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series · 25
A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR
2007 · S.M. Louwsma, E.J.M. van Tuijl, et al. · Custom Integrated Circuits Conference · 15
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An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC
2017 · Harijot Singh Bindra, Anne-Johan Annema, et al. · European Solid-State Circuits Conference (ESSCIRC) · 12
Time-interleaved analog-to-digital converters
2009 · Simon Louwsma · 12
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A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications]
2004 · S.M. Louwsma, E.J.M. van Tuijl, et al. · European Solid-State Circuits Conference (ESSCIRC) · 12
Range pre-selection sampling technique to reduce input drive energy for SAR ADCs
2017 · Harijot Singh Bindra, Joeri Lechevallier, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 10
A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI
2025 · Josef Heel, Harijot Singh Bindra, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7
A 1 Volt switched transconductor mixer in 0.18 μm CMOS
2004 · E.A.M. Klumperink, S.M. Louwsma, et al. · Symposium on VLSI Circuits · 3
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Time-interleaved Track and Holds
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series · 2
Implementation of a High-speed Time-interleaved ADC
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series · 1
Switched Transconductor Mixer Compatible with Future CMOS
2003 · Eric A.M. Klumperink, Simon Louwsma, et al. · University of Twente Research Information · 1
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Switched Transconductor Mixer
2003 · Eric A.M. Klumperink, Simon Louwsma, et al. · University of Twente Research Information · 1
A 12.8-GS/s Time-Interleaved Sub-Sampling ADC Front End With 38-GHz Input Bandwidth and >39-dB SNDR for 1–32 GHz in 22-nm FDSOI
2025 · Josef Heel, Harijot Singh Bindra, et al. · IEEE Journal of Solid-State Circuits
Sub-ADC Architectures for Time-interleaved ADCs
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series
Summary and Conclusions
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series
Introduction
2010 · Simon Louwsma, Ed van Tuijl, et al. · Analog circuits and signal processing/Analog circuits and signal processing series
An Interleaving Track & Hold with 7.6 ENOB @ 1.6 GS/s in 0.12 µm CMOS
2004 · Simon Louwsma, Ed J. M. van Tuijl, et al.
Works count: 25
Citation count: 484
H-index: 10
I10-index: 11
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