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Ahmet Unutulmaz

Observed names: A. Unutulmaz, Unutulmaz, Ahmet
ORCID: 0000-0001-7738-9286
Observed ORCID: 0000-0001-7738-9286
OpenAlex ID: A5007224473
A two-step layout-in-the-loop design automation tool
2015 · G. Berkol, A. Unutulmaz, et al. · IEEE International New Circuits and Systems Conference (NEWCAS) · 19
A template router
2011 · A. Unutulmaz, G. Dundar, et al. · European Conference on Circuit Theory and Design · 13
LDS - A description script for layout templates
2011 · A. Unutulmaz, G. Dundar, et al. · European Conference on Circuit Theory and Design · 11
Implementation and Applications of a Ternary Threshold Logic Gate
2023 · Ahmet Unutulmaz, Cem Ünsalan · Circuits Systems and Signal Processing · 10
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Template coding with LDS and applications of LDS in EDA
2013 · Ahmet Unutulmaz, Günhan Dündar, et al. · Analog Integrated Circuits and Signal Processing · 8
Analysis of NBTI Effects on High Frequency Digital Circuits
2016 · Ahmet Unutulmaz, Domenik Helms, et al. · Design, Automation, and Test in Europe · 7
Area Optimization on Fixed Analog Floorplans Using Convex Area Functions
2013 · A. Unutulmaz, G. Dundar, et al. · Design, Automation, and Test in Europe · 7
LDS based tools to ease template construction
2012 · A. Unutulmaz, G. Dundar, et al. · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design · 4
User dependent aging prediction model for automotive controllers with power electronics
2017 · Sunil Malipatlolla, Ahmet Unutulmaz, et al. · International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) · 2
On the convex formulation of area for slicing floorplans
2015 · Ahmet Unutulmaz, Günhan Dündar, et al. · Integration · 1
Time-to-Digital Converter Approach to Physical Attacks on Integrated Circuits
2026 · Hasan Kaydırma, Ali Tangel, et al. · Istanbul University - Journal of Electrical & Electronics Engineering
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A Novel Analog-Computing-in-Memory Architecture with Scalable Multi-Bit MAC Operations and Flexible Weight Organization for DNN Acceleration
2025 · Ahmet Unutulmaz · Electronics
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A novel low-hardware-cost scan chain architecture resilient to scanSAT attack
2025 · Fatih Tiryakioğlu, Ahmet Unutulmaz, et al. · Integration
A Novel Dynamic Clock Generator Circuit for the Threshold Logic Gate
2025 · Ahmet Unutulmaz · Gazi University Journal of Science Part A Engineering and Innovation
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A Generalized Multiple-Valued FPGA Architecture Based on Improved T-Gate Circuit
2025 · Ahmet Unutulmaz, Cem Ünsalan · IEEE Access
Reconfigurable Multiple-Valued Logic Function and Sequential Circuit Realizations via Threshold Logic Gates
2024 · Unutulmaz, Ahmet, Ünsalan, Cem · arXiv (Cornell University)
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Routing Analog Circuits
2010 · Günhan Dündar, Ahmet Unutulmaz · Springer eBooks
Works count: 17
Citation count: 82
H-index: 7
I10-index: 4
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