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Hoshik Kim

Observed name: Kim, Hoshik
ORCID: 0000-0002-4017-8124
Observed ORCID: 0000-0002-4017-8124
OpenAlex ID: A5008944433
H 3 : H ybrid Architecture Using H igh Bandwidth Memory and H igh Bandwidth Flash for Cost-Efficient LLM Inference
2026 · Minho Ha, Euiseok Kim, et al. · IEEE Computer Architecture Letters · 22
Dynamic Capacity Service for Improving CXL Pooled Memory Efficiency
2023 · Minho Ha, Junhee Ryu, et al. · IEEE Micro · 21
TraCT: Disaggregated LLM Serving with CXL Shared Memory KV Cache at Rack-Scale
2025 · Yoon, Dongha, Min, Younghoon, et al. · arXiv (Cornell University) · 18
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cMPI: Using CXL Memory Sharing for MPI One-Sided and Two-Sided Inter-Node Communications
2025 · Xi Wang, Bin Ma, et al. · International Conference for High Performance Computing, Networking, Storage and Analysis (SC) · 8
PNM Meets Sparse Attention: Enabling Multi-Million Tokens Inference at Scale
2025 · Sookyung Choi, Myunghyun Rhee, et al. · IEEE Computer Architecture Letters · 5
ITME: Inference Tiered Memory Expansion with Disaggregated CXL-Hybrid Memories
2026 · Jang, Hakbeom, Min, Younghoon, et al. · arXiv (Cornell University) · 4
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A CXL Memory Rack for Multi-Turn LLM Serving
2026 · Jang, Hakbeom, Song, Inho, et al. · arXiv (Cornell University) · 3
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AI+HW 2035: Shaping the Next Decade
2026 · Chen, Deming, Cong, Jason, et al. · arXiv (Cornell University) · 3
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Accelerating Sparse Matrix-Matrix Multiplication on GPUs with Processing Near HBMs
2025 · Li, Shiju, Min, Younghoon, et al. · arXiv (Cornell University) · 1
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Integrating Distributed SQL Query Engines with Object-Based Computational Storage
2025 · Junghyun Ryu, Soon Hwang, et al. · International Conference for High Performance Computing, Networking, Storage and Analysis (SC) · 1
MoSKA: Mixture of Shared KV Attention for Efficient Long-Sequence LLM Inference
2025 · Myunghyun Rhee, Sookyung Choi, et al. · IEEE Computer Architecture Letters · 1
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StreamDQ: HBM-Integrated On-the-Fly DeQuantization via Memory Load for Large Language Models
2025 · Minki Jeong, Daegun Yoon, et al. · IEEE Computer Architecture Letters · 1
Adaptive Memory Controller for High-performance Multi-channel Memory
2016 · Jin-ku Kim, Jong-bum Lim, et al. · JSTS Journal of Semiconductor Technology and Science · 1
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HyPAIC: Personal AI Computer with High Bandwidth Flash for High Performance Trillion-Parameter LLM Inference
2026 · Ha, Minho, Rhee, Myunghyun, et al. · arXiv (Cornell University)
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NELSSA: A GPU-PNM Heterogeneous System for Mixed-Length LLM Serving via Length-based Request Placement
2026 · Choi, Sookyung, Lee, Seungyong, et al. · arXiv (Cornell University)
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PAGE: Processing-Using-DRAM Architecture-Circuits Co-Optimization for Efficient Acceleration of General Matrix-Vector Multiplication
2026 · Yifan He, Hyung Joon Byun, et al. · ACM/IEEE Design Automation Conference (DAC)
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StreamDQ: Near-Memory Weight DeQuantization in Custom HBM for Scalable AI Inference Acceleration
2026 · Jeong, Minki, Yoon, Daegun, et al. · arXiv (Cornell University)
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Prompt Caching on Flash: Achieving Memory-Class Latency for LLM Inference
2026 · Joohee Lee, Kwangjin Ko, et al. · IEEE Computer Architecture Letters
Efficient Long-Context LLM Inference With Sparse Attention Over HBM-HBF Tiered Memory
2026 · Jaeyong Lee, Jinna Yang, et al. · IEEE Computer Architecture Letters
CASCADE: A Memory-Centric Chiplet-Array Accelerator for Energy-Efficient LLM Decoding
2026 · Daegun Yoon, Soohong Ahn, et al. · IEEE Computer Architecture Letters
Toward Deployable CXL-PNM: The CMM-Ax Prototype and Software Stack
2026 · Kwangsik Shin, Kangkyu Park, et al. · IEEE Transactions on Computers
JBOC: Just a Bunch of CXL-Enabled SSDs for Resource-Efficient LLM Checkpointing
2026 · Hakbeom Jang, Younghoon Min, et al. · IEEE Computer Architecture Letters
Near-HBM Tensor Core Acceleration for Fine-Grained Sparse Matrix-Matrix Multiplication
2026 · Lihan Hu, Shiju Li, et al. · IEEE Computer Architecture Letters
Characterizing Communication–Computation Interference in LLM Training and Inference
2026 · Yechen Liu, Sejin Oh, et al. · IEEE Computer Architecture Letters
Design and Evaluation of a CXL Hybrid Memory Using Large-Scale Vector Search Workloads
2026 · Jaeil Lim, Hanyee Kim, et al. · IEEE Computer Architecture Letters
Works count: 27
Citation count: 89
H-index: 5
I10-index: 3
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