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Jacek Jasielski
Observed names:
J. Jasielski,
Jasielski Jacek
Institution:
Akademia Tarnowska
Observed institutions:
Akademia Tarnowska,
AGH University of Krakow
ORCID:
0000-0001-8417-6668
Observed ORCID:
0000-0001-8417-6668
OpenAlex ID:
A5010119584
An analog dual delay locked loop using coarse and fine programmable delay elements
2013
·
Jacek Jasielski
, S. Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
16
Four-quadrant analog multiplier based on CMOS inverters
2008
·
Witold Machowski
, Stanisław Kuta
, et al.
·
Analog Integrated Circuits and Signal Processing
·
13
A Concept of Smart Agro-Photovoltaic Tunnels
2024
·
Robert Wielgat
, Andrzej Ko£odziej
, et al.
·
IEEE Access
·
10
PDF
Quarter-square analog four-quadrant multiplier based on CMOS invertes and using low voltage high speed control circuits
2010
·
W. Machowski
, S. Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
9
Fast Low Voltage Analog Four-Quadrant Multipliers Based on CMOS Inverters
2010
·
Witold Machowski
, Stanisław Kuta
, et al.
·
International Journal of Electronics and Telecommunications
·
8
Four-quadrant Analog Multiplier Based On CMOS Inverters
2006
·
W. Machowski
, S. Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
8
Four-quadrant CMOS transconductance multiplier operating at low voltage and high-speed
2010
·
Jacek Jasielski
, S. Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
7
Offset compensation for voltage- and current amplifiers with CMOS inverters
2012
·
W. Machowski
, Jacek Jasielski
·
International Conference Mixed Design of Integrated Circuits and Systems
·
6
Low Voltage Low Frequency Continuous Time CMOS Antialiasing Filters
2007
·
W. Machowski
, J. Jasielski
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
6
Review and comparison of methods for limiting leakage currents in single-phase transformerless PV inverter topologies
2023
·
Wojciech Kołodziejski
, Jacek Jasielski
, et al.
·
Science Technology and Innovation
·
5
PDF
Current controlled delay line elements' improvement study
2012
·
W. Kolodziejski
, S. Kuta
, et al.
·
International Conference on Signals and Electronic Systems
·
5
Low voltage, low power analog multipliers based on CMOS inverters
2011
·
W. Machowski
, Jacek Jasielski
·
International Conference Mixed Design of Integrated Circuits and Systems
·
5
Hybrid LBDD PWM modulator for digital class-BD audio amplifier based on STM32F407VGT6 microcontroller and analog DLL
2015
·
Jacek Jasielski
, Stanislaw Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
4
Hybrid DPWM implementation using coarse and fine programmable ADLL
2014
·
Jacek Jasielski
, Stanisław Kuta
, et al.
·
Microelectronics Journal
·
4
Single-Phase Transformerless Three-Level PV Inverter in CHB Configuration
2025
·
Wojciech Kołodziejski
, Jacek Jasielski
, et al.
·
Electronics
·
3
PDF
Open-Loop Class-BD Audio Amplifiers with Balanced Common-Mode Output
2021
·
Wojciech Kołodziejski
, Stanisław Kuta
, et al.
·
Electronics
·
3
PDF
Cancellation of common-mode output signal in Class-BD audio amplifiers
2016
·
Jacek Jasielski
, Wojciech Kolodziejski
, et al.
·
International Conference on Signals and Electronic Systems
·
3
Misje stratosferyczne Akademii Tarnowskiej: Część 1: sprzęt i oprogramowanie
2024
·
Jakub Antosz
, Regina Arabik
, et al.
·
Science Technology and Innovation
·
2
PDF
Applied methods of power supply and galvanic isolation of gate drivers of power transistors in bridging end stages of Class D amplifiers and inverters
2018
·
Jacek Jasielski
, Stanisław Kuta
·
Science Technology and Innovation
·
2
Class-BD audio amplifiers with common-mode free output
2016
·
Jacek Jasielski
, Stanislaw W. Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
2
Double edge class BD hybrid DPWM implementation using linearized LBDD algorithm
2014
·
Jacek Jasielski
, Stanislaw Kuta
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
2
Broadband quarter-square 4Q analog multiplier based on CMOS inverters
2010
·
W. Machowski
, S. Kuta
, et al.
·
ICSES 2010 International Conference on Signals and Electronic Circuits
·
2
Low voltage charge-pump-based VCO circuits using CMOS inverters as building blocks
2008
·
Wojciech Kolodziejski
, Witold Machowski
, et al.
·
International Conference on Signals and Electronic Systems
·
2
Low voltage analog multipliers based on CMOS inverters
2008
·
W. Machowski
, Jacek Jasielski
, et al.
·
International Conference Mixed Design of Integrated Circuits and Systems
·
2
Niskonapięciowe filtry analogowe dla najnowszych technologii CMOS
2003
·
W. Machowski
, Jacek Jasielski
, et al.
·
Elektronizacja : podzespoły i zastosowania elektroniki
·
2
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Works count:
36
Citation count:
134
H-index:
7
I10-index:
3
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