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Dong‐Ryeol Oh

Observed names: D.‐R. Oh, Dong-Ryeol Oh, Dong-ryeol Oh, Dongryeol Oh
ORCID: 0000-0002-5454-5191
Observed ORCIDs: 0000-0002-5454-5191, 0009-0009-3066-2084
OpenAlex ID: A5013218643
A 65 nm CMOS 7b 2 GS/s 20.7 mW Flash ADC With Cascaded Latch Interpolation
2015 · Jong-In Kim, Dong-Ryeol Oh, et al. · IEEE Journal of Solid-State Circuits · 55
An 8-Bit 1-GS/s Asynchronous Loop-Unrolled SAR-Flash ADC With Complementary Dynamic Amplifiers in 28-nm CMOS
2020 · Dong-Ryeol Oh, Kyoung-Jun Moon, et al. · IEEE Journal of Solid-State Circuits · 52
A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8 $\times$ Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration
2018 · Dong-Ryeol Oh, Jong-In Kim, et al. · IEEE Journal of Solid-State Circuits · 47
A 7-Bit Two-Step Flash ADC With Sample-and-Hold Sharing Technique
2022 · Dong-Ryeol Oh, Min-Jae Seo, et al. · IEEE Journal of Solid-State Circuits · 43
A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing Timing-Skew Background Calibration in 5nm FinFET
2022 · Kyoung-Jun Moon, Dong-Ryeol Oh, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 25
A 28-nm CMOS 12-Bit 250-MS/s Voltage-Current-Time Domain 3-Stage Pipelined ADC
2020 · Kyoung-Jun Moon, Dong-Ryeol Oh, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 22
SAR-Assisted Energy-Efficient Hybrid ADCs
2024 · Kent Edrian Lozada, Dong-Jin Chang, et al. · IEEE Open Journal of the Solid-State Circuits Society · 19
An 8b 1GS/s 2.55mW SAR-Flash ADC with Complementary Dynamic Amplifiers
2020 · Dong-Ryeol Oh, Kyoung-Jun Moon, et al. · Symposium on VLSI Circuits · 19
A 1.5-MHz BW 81.2-dB SNDR Dual-Residue Pipeline ADC With a Fully Dynamic Noise-Shaping Interpolating-SAR ADC
2024 · Jae-Hyun Chung, Ye-Dam Kim, et al. · IEEE Journal of Solid-State Circuits · 17
A 6-bit 10-GS/s 63-mW 4x TI time-domain interpolating flash ADC in 65-nm CMOS
2015 · Dong-Ryeol Oh, Jong-In Kim, et al. · European Solid-State Circuits Conference (ESSCIRC) · 15
Power‐efficient flash ADC with complementary voltage‐to‐time converter
2017 · D.‐R. Oh, D.‐S. Jo, et al. · Electronics Letters · 8
A 6-Bit 20 GS/s Time-Interleaved Two-Step Flash ADC in 40 nm CMOS
2022 · Dong-Ryeol Oh · Electronics · 5
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Power-efficient 4-bit 40-MS/s Time-domain 2-times Interpolating Flash ADC Using Complementary Latching Technique
2024 · Beomjin Kim, Dongryeol Oh · International Journal on Advanced Science Engineering and Information Technology · 2
Two-rank Decimation Technique for High-speed Time-interleaved Analog-to-digital Converters
2025 · Sang-won Oh, Dong-Ryeol Oh · JSTS Journal of Semiconductor Technology and Science · 1
A 0.0012 mm2 6-bit 700 MS/s 1 mW Calibration-Free Pseudo-Loop-Unrolled SAR ADC in 28 nm CMOS
2022 · Eun-Ji An, Dong-Ryeol Oh · Electronics · 1
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An 8-Bit Four-Channel Time-Interleaved SAR-Flash Hybrid ADC with Time-Domain Interpolation
2026 · Sang-Won Oh, Da-Yeon Kim, et al. · Electronics
An 8-bit 3-GS/s Four-Way Time-Interleaved Loop-Unrolled SAR ADC With a MUX-Based Bidirectional Asynchronous Clock Generation
2026 · Ye-Won Yoon, Sang-Won Oh, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An 8-bit 10-GS/s 16× Time-Interleaved SAR ADC for Short-Range Wireless Links in 22-nm FDSOI
2026 · Hyeon-Gi Hwang, Sang-Won Oh, et al. · IEEE Access
A Programmable >3-GHz Digital In-memory Computing Macro with Two-phase Analog-sampler-based Dynamic Pipelining
2026 · Dong-Jin Chang, Jeonghun Son, et al. · IEEE Transactions on Circuits & Systems II Express Briefs
A Passive Noise-Shaping SAR ADC with Kickback-Noise-Canceling Comparator
2025 · Jae-kang Lee, Dong-ryeol Oh · International Journal on Advanced Science Engineering and Information Technology
A 4-times Interpolating Flash Analog-to-digital Converter based on Complementary Dynamic Amplifiers
2025 · Han-Jun Kim, Dong-Ryeol Oh · Journal of the Institute of Electronics and Information Engineers
A 6 bits 10 MS/s SAR ADC with multi-conversion dynamic amplifier
2025 · Jae-Kang Lee, Dong-Ryeol Oh · IEICE Electronics Express
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Loop‐Unrolled SAR ADC With Complementary Voltage‐to‐Time Converters
2025 · Da‐Yeon Kim, Sang‐Won Oh, et al. · Electronics Letters
Works count: 23
Citation count: 331
H-index: 10
I10-index: 10
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