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Hanno Melzner
Observed names:
H. MELZNER,
H. Melzner,
Melzner Hanno,
Melzner, Hanno
Institution:
Infineon Technologies (Germany)
Observed institutions:
Siemens (Germany),
Infineon Technologies (Germany)
OpenAlex ID:
A5013436499
Concurrent wire spreading, widening, and filling
2007
·
Olivier Rizzo
, Hanno Melzner
·
ACM/IEEE Design Automation Conference (DAC)
·
11
Statistical modeling and analysis of wafer test fail counts
2003
·
H. Melzner
·
ASMC proceedings
·
9
Failure Rate Prediction and Accelerated Detection of Anomalous Charge Loss in Flash Memories by Using an Analytical Transient Physics-Based Charge Loss Model
2002
·
Franz Schuler
, Georg Tempel
, et al.
·
Japanese Journal of Applied Physics
·
9
Maximization of Good Chips Per Wafer by Optimization of Memory Redundancy
2007
·
Hanno Melzner
, Alexander Olbrich
·
IEEE Transactions on Semiconductor Manufacturing
·
8
Evaluation of Ti and TiN thicknesses for tungsten plug contact metallization
1993
·
H. Koerner
, H.P. Erb
, et al.
·
Applied Surface Science
·
8
BEX-a novel wafer yield distribution model and analysis
2004
·
H. Melzner
, T. Darnhofer
·
ASMC proceedings
·
6
Micromechanical Adhesion Experiments and Simulation on Cu-Damascene Processed Test Devices
2022
·
W. Heyn
, S. Ananiev
, et al.
·
IEEE Transactions on Device and Materials Reliability
·
4
In-situ SEM micromechanical experiments on Dual Damascene Copper test structures for investigation of interfacial properties of copper interconnects
2021
·
Wieland Heyn
, Hanno Melzner
, et al.
·
IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
·
3
Concurrent Wire Spreading, Widening, and Filling
2007
·
Olivier Rizzo
, Hanno Melzner
·
ACM/IEEE Design Automation Conference (DAC)
·
3
Smaller is Better? Maximization of Good Chips per Wafer by Co-Optimization of Yield and Chip Area
2006
·
H. Melzner
·
ASMC proceedings
·
3
A Self Aligned Contact Process With Improved Surface Planarization
1988
·
K. H. KÜSTERS
, W. SESSELMANN
, et al.
·
Le Journal de Physique Colloques
·
3
Adhesion experiments on Cu-Damascene processed interconnect structures for mode III loading
2023
·
W. Heyn
, H. Melzner
, et al.
·
Microelectronics Reliability
·
2
A Yield Model Incorporating Random and Systematic Yield Part I: Theory
2008
·
Hanno Melzner
·
ASMC proceedings
·
2
A routing clean-up methodology for improvement of defect and lithography related yield
2008
·
Jacques Herry
, Reinhard März
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
2
Critical Area Analysis of IC layout for automotive application
2016
·
Ke Kian Seng Joseph
, Tan Ban Heng
, et al.
·
IEEE International Conference on Semiconductor Electronics
·
1
Latent defect detection in microcontroller embedded flash test using device stress and wordline outlier screening
2014
·
Andreas Kux
, Rudolf Ullmann
, et al.
·
IEEE International Test Conference (ITC)
·
1
Navigating in the density plane – achieving flat wafer surface and uniform metal thickness in CMP processes
2010
·
Hanno Melzner
, Ning Cui
, et al.
·
ASMC proceedings
·
1
Time Dependent Anomalous Charge Loss Modeling in Flash Memories and an Accelerated Testing Procedure
2001
·
Franz Schuler
, Georg Tempel
, et al.
·
International Conference on Solid State Devices and Materials (SSDM)
·
1
Device and Method for Measuring Interface Strength in Microstructures
2021
·
Hanno Melzner
, Wieland Heyn
, et al.
·
SSRN Electronic Journal
自動車応用のためのICレイアウトの臨界領域解析【Powered by NICT】
2016
·
Joseph Ke Kian Seng
, Heng Tan Ban
, et al.
·
IEEE Conference Proceedings
Special Section on the Advanced Semiconductor Manufacturing Conference 2007 (ASMC 2007)
2008
·
Oliver D. Patterson
, Hanno Melzner
, et al.
·
IEEE Transactions on Semiconductor Manufacturing
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Works count:
22
Citation count:
77
H-index:
6
I10-index:
1
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