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Sudip Ghosh

Observed names: SUDIP GHOSH, Sudip Ghosh -
ORCID: 0000-0001-5750-2501
Observed ORCID: 0000-0001-5750-2501
OpenAlex ID: A5014643745
Spread Spectrum Image Watermarking with Digital Design
2009 · Sudip Ghosh, Pranab Ray, et al. · IEEE International Advance Computing Conference · 22
FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time
2017 · Sambaran Hazra, Sudip Ghosh, et al. · Journal of Real-Time Image Processing · 18
FPGA based Implementation of Embedding and Decoding Architecture for Binary Watermark by Spread Spectrum Scheme in Spatial Domain
2012 · Sudip Ghosh · Bonfring International Journal of Advances in Image Processing · 14
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A novel dual purpose spatial domain algorithm for digital image watermarking and cryptography using Extended Hamming Code
2015 · Sudip Ghosh, Sayandip De, et al. · International Conference on Electrical Information and Communication Technologies · 13
A New FPGA and Programmable SoC Based VLSI Architecture for Histogram Generation of Grayscale Images for Image Processing Applications
2016 · Sambaran Hazra, Sudip Ghosh, et al. · Procedia Computer Science · 12
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A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation
2020 · Shivdeep, Sudip Ghosh, et al. · International Symposium on Devices, Circuits and Systems (ISDCS) · 11
FPGA and SoC based VLSI architecture of reversible watermarking using rhombus interpolation by difference expansion
2014 · Sudip Ghosh, Nachiketa Das, et al. · IEEE India Conference · 10
Dual Mode VLSI Architecture for Spread Spectrum Image Watermarking using Binary Watermark
2012 · Sudip Ghosh, Somsubhra Talapatra, et al. · Procedia Technology · 10
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A novel VLSI architecture for Walsh-Hadamard transform
2010 · Sudip Ghosh, Somsubhra Talapatra, et al. · Asia Symposium on Quality Electronic Design · 10
A new algorithm for grayscale image histogram computation
2015 · Sudip Ghosh, Sambaran Hazra, et al. · IEEE India Conference · 9
Design and implementation of fast FPGA based architecture for reversible watermarking
2014 · Sudip Ghosh, Bijoy Kundu, et al. · International Conference on Electrical Information and Communication Technology (EICT) · 8
A rule-based approach for minimizing power dissipation of digital circuits
2016 · Subrata Das, Parthasarathi Dasgupta, et al. · IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) · 6
Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA
2014 · Sudip Ghosh, Arijit Biswas, et al. · International Symposium on Electronic System Design · 6
Fault-Tolerant Implementation of Quantum Arithmetic and Logical Unit (QALU) Using Clifford+T-Group
2020 · Laxmidhar Biswal, Chandan Bandyopadhyay, et al. · Advances in intelligent systems and computing · 5
VLSI Architecture for Spread Spectrum Image Watermarking in Walsh-Hadamard Transform Domain Using Binary Watermark
2012 · Sudip Ghosh, Somsubhra Talapatra, et al. · International Conference on Computer and Communication Technology · 5
Implementation of Area Efficient Adders for Inexact Computing
2023 · Rounak Roy, Sudip Ghosh, et al. · International Symposium on Devices, Circuits and Systems (ISDCS) · 4
An adaptive feedback based reversible watermarking algorithm using difference expansion
2015 · Sudip Ghosh, Nachiketa Das, et al. · IEEE International Conference on Recent Trends in Information Systems · 4
A new algorithm on wavelet based robust invisible digital image watermarking for multimedia security
2015 · Sudip Ghosh, Subhojit Chatterjee, et al. · International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV) · 4
Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA
2014 · Sudip Ghosh, Nachiketa Das, et al. · 4
Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR
2021 · Sudip Ghosh, Yuvam Bhateja, et al. · Circuits Systems and Signal Processing · 3
ML Based Diagnosis for Fault Location in Digital Circuits
2024 · Diptanshu Bagchi, Habibur Rahaman, et al. · Proceedings - Asian Test Symposium/Proceedings · 2
A Novel 2D Mapping Scheme for Nearest Neighbor Design of Quantum Circuits
2022 · Subham Kumar, Anirban Bhattacharjee, et al. · IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) · 2
HLS Based Implementation of Modified DE-RIW Algorithm on FPGA and P-SoC
2020 · Shivdeep, Ankur Biswas, et al. · IEEE International Conference for Convergence in Engineering (ICCE) · 2
Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach
2018 · Subhajit Das, Sudip Ghosh, et al. · Circuits Systems and Signal Processing · 2
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Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture for Real-Time Applications
2015 · Sudip Ghosh, Arijit Biswas, et al. · Journal of Low Power Electronics · 2
Works count: 54
Citation count: 206
H-index: 9
I10-index: 9
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