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Vincent Dessard

Observed names: Dessard, V., Dessard, Vincent, V Dessard, V. Dessard
OpenAlex ID: A5015287988
Fully depleted SOI CMOS technology for heterogeneous micropower, high-temperature or RF microsystems
2001 · D Flandre, S Adriaensen, et al. · Solid-State Electronics · 89
Analog performance and application of graded-channel fully depleted SOI MOSFETs
2000 · Marcelo Antonio Pavanello, João Antonio Martino, et al. · Solid-State Electronics · 81
Composite ULP diode fabrication, modelling and applications in multi-Vth FD SOI CMOS technology
2004 · David Levacq, Christophe Liber, et al. · Solid-State Electronics · 52
Low Leakage SOI CMOS Static Memory Cell With Ultra-Low Power Diode
2007 · David Levacq, Vincent Dessard, et al. · IEEE Journal of Solid-State Circuits · 36
On the high-temperature subthreshold slope of thin-film SOI MOSFETs
2002 · T. Rudenko, V. Kilchytska, et al. · IEEE Electron Device Letters · 33
SOI n-MOSFET low-frequency noise measurements and modeling from room temperature up to 250°C
2002 · V. Dessard, B. Iniguez, et al. · IEEE Transactions on Electron Devices · 30
Determination of film and surface recombination in thin-film SOI devices using gated-diode technique
2003 · T. Rudenko, A. Rudenko, et al. · Solid-State Electronics · 27
Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications
2001 · L. Demeus, V. Dessard, et al. · IEEE Transactions on Industrial Electronics · 26
A bandgap circuit operating up to 300°C using lateral bipolar transistors in thin-film CMOS-SOI technology
2003 · S. Adriaensen, V. Dessard, et al. · IEEE International SOI Conference (SOI) · 21
0.25 μm fully depleted SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters
2002 · M Vanmackelberg, C Raynaud, et al. · Solid-State Electronics · 20
The graded-channel SOI MOSFET to alleviate the parasitic bipolar effects and improve the output characteristics
1999 · Marcelo Antonio Pavanello, J. A. Martino, et al. · Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) · 18
A physically-based C/sub ∞/-continuous model for accumulation-mode SOI pMOSFETs
1999 · B. Iniguez, V. Dessard, et al. · IEEE Transactions on Electron Devices · 18
A revised reverse gated-diode technique for determining generation parameters in thin-film silicon-on-insulator devices and its application at high temperatures
2005 · T. Rudenko, V. Kilchytska, et al. · Journal of Applied Physics · 16
Ultra-Low Power Flip-Flops for MTCMOS Circuits
2005 · D. Levacq, V. Dessard, et al. · IEEE International Symposium on Circuits and Systems proceedings · 15
Intelligent SOI CMOS integrated circuits and sensors for heterogeneous environments and applications
2003 · D. Flandre, S. Adriaensen, et al. · Proceedings of IEEE Sensors/Proceedings of IEEE Sensors ... · 14
Design and application of SOI CMOS OTAs for high-temperature applications
1998 · Denis Flandre, Laurent Demeûs, et al. · Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) · 14
25 to 300°C ultra-low-power voltage reference compatible with standard SOI CMOS process
2002 · S. Adriaensen, V. Dessard, et al. · Electronics Letters · 12
Thin-film SOI n-MOSFET low-frequency noise measurements at elevated temperatures
1998 · V. Dessard, J.P. Eggermont, et al. · High-Temperature Electronic Materials, Devices and Sensors Conference · 11
Improved LOCOS isolation for thin-film SOI MOSFETs
1996 · J.P. Colinge, A. Crahay, et al. · Electronics Letters · 11
SOI current and voltage reference sources for applications up to 300°C
2002 · J.P. Eggermont, V. Dessard, et al. · International High Temperature Electronics Conference (HITEC) · 10
High temperature electronics for high power density DC-DC Converters and Motor Drives
2010 · Pierre Delatte, Vincent Dessard, et al. · International Conference on Integrated Power Electronics Systems (CIPS) · 8
A comparative study of non-linearities in bulk and SOI linear resistors based on 2- and 4-transistor structures
2002 · B. Gentinne, V. Dessard, et al. · IEEE International SOI Conference (SOI) · 7
The art of high temperature FD-SOI CMOS
2003 · L. Demeus, P. Delatte, et al. · European Conference on High Temperature Electronics (HITEN) · 4
Low-Noise High-Temperature SOI Analog Circuits
2002 · V. Dessard, B. Iniguez, et al. · Springer eBooks · 4
Unified 1/ f noise SOI MOSFET modellingforcircuit simulation
1997 · B. Iñíguez, M. Tambani, et al. · Electronics Letters · 3
Works count: 67
Citation count: 604
H-index: 14
I10-index: 20
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