Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Sheng-En David Lin
Observed name:
Sheng-En Lin
Institution:
Cadence Design Systems (United States)
Observed institutions:
National Sun Yat-sen University,
St. John's University,
Cadence Design Systems (United States),
Washington State University
ORCID:
0009-0000-2235-5695
Observed ORCID:
0009-0000-2235-5695
OpenAlex ID:
A5016037177
Construction of All Rectilinear Steiner Minimum Trees on the Hanan Grid and Its Applications to VLSI Design
2019
·
Sheng-En David Lin
, Dae Hyun Kim
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
16
Wire Length Characteristics of Multi-Tier Gate-Level Monolithic 3D ICs
2016
·
Sheng-En David Lin
, Dae Hyun Kim
·
IEEE Transactions on Emerging Topics in Computing
·
11
Construction of All Rectilinear Steiner Minimum Trees on the Hanan Grid
2018
·
Sheng-En David Lin
, Dae Hyun Kim
·
International Symposium on Physical Design
·
7
Optimization of dynamic power consumption in multi-tier gate-level monolithic 3D ICs
2016
·
Sheng-En David Lin
, Partha Pratim Pande
, et al.
·
International Symposium on Quality Electronic Design (ISQED)
·
7
Construction of All Multilayer Monolithic RSMTs and Its Application to Monolithic 3D IC Routing
2023
·
Monzurul Islam Dewan
, Sheng-En David Lin
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
6
PDF
Detailed-Placement-Enabled Dynamic Power Optimization of Multitier Gate-Level Monolithic 3-D ICs
2017
·
Sheng-En David Lin
, Dae Hyun Kim
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
6
Construction of All Multilayer Monolithic Rectilinear Steiner Minimum Trees on the 3D Hanan Grid for Monolithic 3D IC Routing
2019
·
Sheng-En David Lin
, Dae Hyun Kim
·
International Symposium on Physical Design
·
3
PDF
Dual-channel pulse-width-modulation ASIC for isolated bio-signal recording front-end
2015
·
Sheng-En Lin
, Shi-Hao Ou
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
·
1
Design for Middle-Way of Intelligent Energy-Saving System with Embedded System
2012
·
Chun-Liang Hsu
, Sheng-En Lin
·
International Conference on Digital Manufacturing & Automation
·
1
Routing Complexity Minimization of Monolithic Three-Dimensional Integrated Circuits
2019
·
Sheng-En David Lin
, Dae Hyun Kim
·
International Symposium on Quality Electronic Design (ISQED)
Physical Design Solutions for the Design of Low Power Multi-tier Gate-level Monolithic Three Dimensional Integrated Circuits
2018
·
Sheng-En David Lin
·
Research Exchange (Washington State University)
Show more works
View as search
Works count:
11
Citation count:
58
H-index:
6
I10-index:
2
Year
Topic
Type
