Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Myeong‐Hoon Oh
Observed names:
M.-H. OH,
Myeong-Hoon OH,
Myeong-Hoon Oh,
MyeongHoon Oh,
Myeonghoon Oh,
Oh Myeong-Hoon,
오명훈
show all 7
Institution:
Honam University
Observed institutions:
University of Science and Technology,
Electronics and Telecommunications Research Institute,
Honam University,
Gwangju Institute of Science and Technology,
Institute of Electronics, Information and Communication Engineers,
Korea University of Science and Technology
show all 6
ORCID:
0000-0002-6019-1422
Observed ORCID:
0000-0002-6019-1422
OpenAlex ID:
A5016097144
Hardware Implementation and Analysis of Gen-Z Protocol for Memory-Centric Architecture
2020
·
Seokbin Hong
, Won-Ok Kwon
, et al.
·
IEEE Access
·
20
PDF
Persistent Memory Object Storage and Indexing for Scientific Computing
2020
·
Awais Khan
, Hyogi Sim
, et al.
·
IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC)
·
9
PDF
Gen‐Z memory pool system implementation and performance measurement
2021
·
Won‐ok Kwon
, Song‐Woo Sok
, et al.
·
ETRI Journal
·
8
Signal integrity analysis of system interconnection module of high‐density server supporting serial RapidIO
2019
·
Hyukje Kwon
, Wonok Kwon
, et al.
·
ETRI Journal
·
8
PDF
Design and Implementation of Asynchronous Processor on FPGA
2022
·
Ziho Shin
, Myeong-Hoon Oh
·
IEEE Access
·
7
PDF
Design of Clockless 32-bit Processor Core Using a Top-Down Based Asynchronous Circuit Design Flow
2009
·
Myeong‐Hoon Oh
, Young‐Woo Kim
, et al.
·
International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)
·
7
Design of Low-Power Asynchronous MSP430 Processor Core Using AFSM Based Controllers
2008
·
Myeong‐Hoon Oh
, Chi-Hoon Shin
, et al.
·
International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)
·
7
Gen-Z Memory Pool System Architecture
2020
·
Wonok Kwon
, Chanho Park
, et al.
·
International Conference on Information and Communication Technology Convergence (ICTC)
·
5
Design of a clockless MSP430 core using mixed asynchronous design flow
2017
·
Ziho Shin
, Myeong-Hoon Oh
, et al.
·
IEICE Electronics Express
·
5
PDF
Architectural Design Issues in a Clockless 32 Bit Processor Using an Asynchronous HDL
2013
·
Myeong-Hoon Oh
·
ETRI Journal
·
5
PDF
Detection and Tracking of Underwater Fish Using the Fair Multi-Object Tracking Model: A Comparative Analysis of YOLOv5s and DLA-34 Backbone Models
2024
·
Sang-Hyun Lee
, Myeong-Hoon Oh
·
Applied Sciences
·
4
PDF
Asynchronous Circuit Designs on an FPGA for Targeting a Power/Energy Efficient SoC
2014
·
Jeong-Gun LEE
, Myeong-Hoon OH
·
IEICE Transactions on Electronics
·
4
Asynchronous 2-Phase Protocol Based on Ternary Encoding for On-Chip Interconnect
2011
·
Myeong-Hoon Oh
·
ETRI Journal
·
4
PDF
472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device
2011
·
Jeong-Gun Lee
, Deok-Young Lee
, et al.
·
IEICE Electronics Express
·
4
PDF
Low Delay-Power Product Current-Mode Multiple Valued Logic for Delay-Insensitive Data Transfer Mechanism
2005
·
M.-H. OH
·
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
·
4
Multi‐communication layered HPL model and its application to GPU clusters
2021
·
Young Woo Kim
, Myeong‐Hoon Oh
, et al.
·
ETRI Journal
·
3
PDF
Implementation of an Asynchronous Micro-controlleron the Commercial FPGA
2017
·
Ziho Shin
, Myeong-Hoon Oh
, et al.
·
International Journal of Computer Theory and Engineering
·
3
PDF
Design of asynchronous MSP430 microprocessor using balsa back-end retargeting
2009
·
Sanghoon Kwak
, Hyung-Woo Lee
, et al.
·
Southern Conference on Programmable Logic (SPL)
·
3
A Novel Mechanism for Delay-Insensitive Data Transfer Based on Current-Mode Multiple Valued Logic
2004
·
Myeong-Hoon Oh
, Dong-Soo Har
·
Lecture notes in computer science
·
3
Verification of Interconnect RTL Code for Memory-Centric Computing using UVM
2021
·
Hyuk Je Kwon
, Myeong-Hoon Oh
, et al.
·
International Conference on Electronics, Information, and Communication (ICEIC)
·
2
Implementation and Analysis of a memory-semantic interconnect based on Gen-Z Protocol
2020
·
Seokbin Hong
, Song-Woo Sok
, et al.
·
IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia)
·
2
Wire Optimization and Delay Reduction for High-Performance on-Chip Interconnection in GALS Systems
2017
·
Myeong-Hoon Oh
, Young Woo Kim
, et al.
·
ETRI Journal
·
2
Analysis on Low-Voltage Operation Behavior and EMI Emission in Asynchronous Processor
2014
·
Myeong-Hoon Oh
·
The Journal of Korean Institute of Information Technology
·
2
Fine-grained power gating of datapath using FSM
2011
·
Chi-Hoon Shin
, Myeong-Hoon Oh
, et al.
·
Networked Embedded Systems for Enterprise Applications
·
2
Cost-effective delay-insensitive data transfer mechanism using current-mode multiple valued logic
2004
·
Myeong-Hoon Oh
, Dong-Geun Paek
, et al.
·
IEEE International SOC Conference (SOCC)
·
2
Show more works
View as search
Works count:
52
Citation count:
134
H-index:
7
I10-index:
1
Year
Topic
Type