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Thorsten Jungeblut

Observed names: Jungeblut Thorsten, Jungeblut, Thorsten, Jungeblut, Thorsten ; https://orcid.org/0000-0001-7425-8766, T. Jungeblut
ORCID: 0000-0001-7425-8766
Observed ORCID: 0000-0001-7425-8766
OpenAlex ID: A5016691715
A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
2012 · Sven Lutkemeier, Thorsten Jungeblut, et al. · IEEE Journal of Solid-State Circuits · 86
Exploring spiking neural networks: a comprehensive analysis of mathematical models and applications
2023 · Sanaullah, Shamini Koravuna, et al. · Frontiers in Computational Neuroscience · 37
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CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories
2017 · Johannes Ax, Gregor Sievers, et al. · IEEE Transactions on Parallel and Distributed Systems · 31
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Towards an SSVEP-BCI Controlled Smart Home
2019 · Michael Adams, Sadok Ben-Salem, et al. · Conference proceedings/Conference proceedings - IEEE International Conference on Systems, Man, and Cybernetics · 29
A 200mV 32b subthreshold processor with adaptive supply voltage control
2012 · Sven Luetkemeier, Thorsten Jungeblut, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 27
Evaluation of Spiking Neural Nets-Based Image Classification Using the Runtime Simulator RAVSim
2023 · Sanaullah, Shamini Koravuna, et al. · International Journal of Neural Systems · 24
CoreVA: A Configurable Resource-Efficient VLIW Processor Architecture
2014 · Boris Hubener, Gregor Sievers, et al. · IEEE International Conference on Computational Science and Engineering (CSE) and IEEE International Conference on Embedded and Ubiquitous Computing (EUC) · 17
Comparing Synchronous, Mesochronous and Asynchronous NoCs for GALS Based MPSoCs
2017 · Johannes Ax, Nils Kucza, et al. · IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) · 16
Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI
2015 · Gregor Sievers, Johannes Ax, et al. · IEEE International Symposium on Circuits and Systems proceedings · 15
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A communication model and partitioning algorithm for streaming applications for an embedded MPSoC
2014 · Wayne Kelly, Martin Flasskamp, et al. · International Symposium on System-on-Chip · 15
SNNs Model Analyzing and Visualizing Experimentation Using RAVSim
2022 · Sanaullah, Shamini Koravuna, et al. · Communications in computer and information science · 12
Design Space Exploration for Memory Subsystems of VLIW Architectures
2010 · Thorsten Jungeblut, Gregor Sievers, et al. · IEEE International Conference on Networking, Architecture and Storage (NAS) · 12
Performance estimation of streaming applications for hierarchical MPSoCs
2016 · Martin Flasskamp, Gregor Sievers, et al. · Rapid Simulation and Performance Evaluation: Methods and Tools · 11
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Multi-Modal Obstacle Detection and Evaluation of Occupancy Grid Mapping in Agriculture
2016 · Mikkel Fly Kragh, Peter Christiansen, et al. · PUB – Publications at Bielefeld University (Bielefeld University) · 11
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LEGaTO
2018 · Adrian Cristal, Osman S. Unsal, et al. · ACM International Conference on Computing Frontiers (CF) · 10
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A connected chair as part of a smart home environment
2017 · Marc Hesse, Andre Frank Krause, et al. · Wearable and Implantable Body Sensor Networks · 10
Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI
2015 · Gregor Sievers, Julian Daberkow, et al. · IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) · 10
A 65 nm standard cell library for ultra low-power applications
2015 · Marten Vohrmann, Saikat Chatterjee, et al. · European Conference on Circuit Theory and Design · 9
A TCMS-based architecture for GALS NoCs
2012 · Thorsten Jungeblut, Johannes Ax, et al. · IEEE International Symposium on Circuits and Systems proceedings · 9
A Framework for Learning Event Sequences and Explaining Detected Anomalies in a Smart Home Environment
2022 · Justin Baudisch, Birte Richter, et al. · Künstliche Intell. · 8
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LEGaTO
2018 · Adrian Cristal, Osman S. Unsal, et al. · International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation · 7
System-Level Analysis of Network Interfaces for Hierarchical MPSoCs
2015 · Johannes Ax, Gregor Sievers, et al. · International Workshop on Network on Chip Architectures (NoCArc) · 7
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Streamlined Training of GCN for Node Classification with Automatic Loss Function and Optimizer Selection
2023 · Sanaullah, Shamini Koravuna, et al. · Communications in computer and information science · 6
The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio
2016 · Gregor Sievers, Boris Hübener, et al. · Springer eBooks · 6
Design-space exploration of the configurable 32 bit VLIW processor CoreVA for signal processing applications
2013 · Gregor Sievers, Peter Christ, et al. · NORCHIP · 6
Works count: 117
Citation count: 504
H-index: 12
I10-index: 17
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