Author

Kallepelli Sagar

Observed name: Sagar Kallepelli

Institution: SR University

Observed institutions: National Institute of Technology Warangal, SR University

ORCID: 0000-0001-9875-924X

Observed ORCID: 0000-0001-9875-924X

OpenAlex ID: A5016899722

A novel circular double-gate SOI MOSFET with raised source/drain

2021 · Sagar Kallepelli, Satish Maheshwaram · Semiconductor Science and Technology · 25

PDF

Optimization of Sidewall Spacer Engineering at Sub-5 nm Technology Node For JL-Nanowire FET: Digital/Analog/RF/Circuit Perspective

2023 · Chandana Anguru, Vamsi Krishna Aryasomayajula, et al. · ECS Journal of Solid State Science and Technology · 17

Performance Analysis of Sub 10 nm Double Gate Circular MOSFET

2022 · Kallepelli Sagar, Satish Maheshwaram · Silicon · 8

A Novel Vertically Stacked Circular Nanosheet FET for High-Performance Applications

2022 · Sagar Kallepelli, Satish Maheshwaram · ECS Journal of Solid State Science and Technology · 6

Benchmarking and Optimization of Circular Double Gate Transistor (CDGT) for Sub 10 nm Nodes

2023 · Kallepelli Sagar, Satish Maheshwaram · Silicon · 5

RETRACTED ARTICLE: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials

2023 · M. V. Ganeswara Rao, N. Ramanjaneyulu, et al. · Transactions on Electrical and Electronic Materials · 4

TCAD-Based Investigation of a Wavelength-Tunable Near-Infrared Photodetector Using Vertical TFET with Optical Gate

2025 · Pasumala Vamshidhar Reddy, Raushan Kumar, et al. · International Conference on Electrical, Electronics, Communication and Computers (ELEXCOM) · 3

Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes

2023 · Sagar Kallepelli, Satish Maheshwaram, et al. · Microelectronics Journal · 3

Performance Comparison of Circular Double Gate Transistor (CDGT) with Novel Architectures for High-Performance Applications

2022 · Kallepelli Sagar, Maheshwaram Satish · IEEE International Symposium on Smart Electronic Systems (iSES) · 3

Enhancing Device Performance with Circular Layout Transistors: A Comparative Study of CDGT and CSNT

2025 · Sagar Kallepelli, Satish Maheshwaram, et al. · Silicon · 2

An Alternative Logic Approach to Implement Energy Efficient 90-Nm Cmos Full Adders

2012 · KITS, Warangal, Onteru Anjaneyulu, et al. · International Journal of Scientific Research · 2

Spacer Engineered Halo-Doped Nanowire MOSFET for Digital Applications

2024 · P. Kiran Kumar, B. Balaji, et al. · Journal of Electronic Materials · 1

Hybrid U-Net and XGBoost Framework for Automated Diabetic Retinopathy Diagnosis

2026 · Ravi Raju Bandlamudi, Kallepelli Sagar, et al.

Thought2Text: EEG-to-Text Translation Using Seq2Seq Models

2026 · Ravi Raju Bandlamudi, Kallepelli Sagar, et al.

Noise-Resilient Transformer for Open-Vocabulary EEG-to-Text Decoding

2026 · Ravi Raju Bandlamudi, Kallepelli Sagar, et al.

Performance Evaluation of High-k Engineered Nanosheet FETs in High-Speed Digital Circuits

2026 · Chaithanya Pasunuti, Kallepelli Sagar, et al. · IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)

Retraction Note: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials

2024 · M. V. Ganeswara Rao, N. Ramanjaneyulu, et al. · Transactions on Electrical and Electronic Materials

PDF

Works count: 17

Citation count: 79

H-index: 5

I10-index: 2