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Mazad Zaveri

Observed names: M.S. Zaveri, Mazad S Zaveri, Mazad S. Zaveri, Zaveri, Mazad, Zaveri, Mazad S., Zaveri, Mazad Shaheriar
ORCID: 0000-0002-3840-8373
Observed ORCID: 0000-0002-3840-8373
OpenAlex ID: A5017864608
FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm
2020 · Ankur Changela, Mazad Zaveri, et al. · Integration · 33
Vision-based investigation of road traffic and violations at urban roundabout in India using UAV video: A case study
2023 · Yagnik M Bhavsar, Mazad S Zaveri, et al. · Transportation Engineering · 24
Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures
2019 · Manan Mewada, Mazad Zaveri, et al. · Integration · 20
Performance/price estimates for cortex-scale hardware: A design space exploration
2010 · Mazad S. Zaveri, Dan Hammerstrom · Neural Networks · 19
Mixed-radix, virtually scaling-free CORDIC algorithm based rotator for DSP applications
2021 · Ankur Changela, Mazad Zaveri, et al. · Integration · 17
CMOL/CMOS Implementations of Bayesian Polytree Inference: Digital and Mixed-Signal Architectures and Performance/Price
2009 · M.S. Zaveri, D. Hammerstrom · IEEE Transactions on Nanotechnology · 15
ASIC Implementation of High Performance Radix-8 CORDIC Algorithm
2018 · Ankur Changela, Mazad Zaveri, et al. · International Conference on Advances in Computing, Communications and Informatics (ICACCI) · 14
A Comparative Study on CORDIC Algorithms and Applications
2022 · Ankur Changela, Mazad Zaveri, et al. · Journal of Circuits Systems and Computers · 13
FPGA Implementation of Asynchronous Mousetrap Pipelined Radix-2 CORDIC Algorithm
2018 · Ankur Changela, Mazad Zaveri, et al. · International Conference on Current Trends towards Converging Technologies (ICCTCT) · 12
An input test pattern for characterization of a full-adder and n-bit ripple carry adder
2016 · Manan Mewada, Mazad Zaveri · International Conference on Advances in Computing, Communications and Informatics (ICACCI) · 12
CMOS / CMOL architectures for spiking cortical column
2008 · Changjian Gao, Mazad S. Zaveri, et al. · International Joint Conference on Neural Networks (IJCNN) · 11
Transmission Gate and Hybrid Cmos Full Adder Characterization and Power-Delay Product Estimation Based on Mathematical Model
2020 · Manan Mewada, Mazad Zaveri, et al. · Procedia Computer Science · 8
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Prospects for building cortex-scale CMOL/CMOS circuits: A design space exploration
2009 · Dan Hammerstrom, Mazad S. Zaveri · NORCHIP · 8
A low-power high-speed hybrid full adder
2016 · Manan Mewada, Mazad Zaveri · International Symposium on VLSI Design and Test (VDAT) · 6
A New Angle Set-Based Absolute Scaling-free Reconfigurable Cordic Algorithm
2023 · Ankur Changela, Mazad Zaveri, et al. · Circuits Systems and Signal Processing · 5
Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions
2017 · Manan Mewada, Mazad Zaveri, et al. · Communications in computer and information science · 5
Evaluating defensive driving behaviour based on safe distance between vehicles: A case study using computer vision on UAV videos at urban roundabout
2025 · Yagnik M. Bhavsar, Mazad S. Zaveri, et al. · Multimodal Transportation · 4
Bayesian Memory, a Possible Hardware Building Block for Intelligent Systems
2008 · Dan Hammerstrom, Mazad Zaveri · 4
Experiments with Multinational Cross-Course Project
2020 · Mehul S Raval, Tolga Kaya, et al. · IEEE International Conference on Teaching, Assessment, and Learning for Engineering · 3
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CMOL/CMOS Hardware Architectures and Performance/price for Bayesian Memory - The Building Block of Intelligent Systems
2008 · Zaveri, Mazad Shaheriar · 3
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U-UTM: A Cyber-Physical System for Road Traffic Monitoring Using UAVs
2024 · Yagnik M Bhavsar, Mazad S Zaveri, et al. · IEEE International Conference on Vehicular Electronics and Safety (ICVES) · 2
CMOL/CMOS Implementations of Bayesian Inference Engine: Digital and Mixed-Signal Architectures and Performance/Price – A Hardware Design Space Exploration
2010 · Dan Hammerstrom, Mazad S. Zaveri · Analog circuits and signal processing/Analog circuits and signal processing series · 1
Evaluating Traffic Conflicts and Congestion Based on Right-Turning Driving Behaviour Using Evasive Actions Driven PET via UAV Video Analysis: A Case Study of Uncontrolled Heterogeneous T-Intersection in India
2026 · Yagnik M. Bhavsar, Mazad S. Zaveri, et al. · Technologies
DRASHTI-HaOBB: Drone nadiR-view Annotated imageS of veHicles dataseT for India - Heading-angle Oriented Bounding Box: Indian Vehicle Oriented-Object-Detection Dataset with 1.3 Million Samples
2026 · Bhavsar, Yagnik, Zaveri, Mazad, et al. · Zenodo (CERN European Organization for Nuclear Research)
Descriptor: Drone Nadir-View Annotated Images of Vehicles Detection Dataset for India With Heading-Angle Oriented Bounding Box (DRASHTI-HaOBB)
2026 · Yagnik M. Bhavsar, Mazad S. Zaveri, et al. · IEEE data descriptions.
Works count: 29
Citation count: 239
H-index: 11
I10-index: 11
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