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John Vista

Observed names: J Vista, J. Vista, Vista John
ORCID: 0000-0002-8662-9277
Observed ORCID: 0000-0002-8662-9277
OpenAlex ID: A5017965670
A Simple Floating MOS-Memristor for High-Frequency Applications
2019 · John Vista, Ashish Ranjan · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 96
MOSFET-Based Memristor for High-Frequency Signal Processing
2022 · Mourina Ghosh, Ankur Singh, et al. · IEEE Transactions on Electron Devices · 71
High Frequency Meminductor Emulator Employing VDTA and its Application
2019 · John Vista, Ashish Ranjan · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 65
Flux Controlled Floating Memristor Employing VDTA: Incremental or Decremental Operation
2020 · John Vista, Ashish Ranjan · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 60
Simple charge controlled floating memcapacitor emulator using DXCCDITA
2020 · John Vista, Ashish Ranjan · Analog Integrated Circuits and Signal Processing · 43
A tuneable active inductor employing DXCCTA: Grounded and floating operation
2019 · Navnit Kumar, John Vista, et al. · Microelectronics Journal · 33
Design of Memcapacitor Emulator using DVCCTA
2019 · John Vista, Ashish Ranjan · Journal of Physics Conference Series · 22
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Second Order Universal Filter Using Four Terminal Floating Nullor (FTFN)
2018 · Ashish Ranjan, Subrahmanyam Perumalla, et al. · Journal of Circuits Systems and Computers · 14
Third order voltage mode universal filter using CCCII
2016 · Ashish Ranjan, Subrahmanyam Perumalla, et al. · Analog Integrated Circuits and Signal Processing · 12
A Novel Differential Voltage Current Conveyor (DVCC) Based Instrumentation Amplifier
2019 · John Vista, Nonglen Meitei Pheiroijam, et al. · IETE Journal of Research · 8
Realization of single and double cole tissue models using higher order approximation
2017 · Ravi Kumar, Subrahmanyam Perumalla, et al. · 2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech) · 5
A minimal memristor emulator using DVCCTA for analog neuromorphic logic
2025 · Prerna Rana, Ashish Ranjan, et al. · AEU - International Journal of Electronics and Communications · 3
Three-Input Single-Output (TISO) Multifunction Bi-Quad Filter Implementation using VDTA
2019 · Prerna Rana, John Vista, et al. · International Conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC) · 1
Fractional order device modeling using higher order approximation
2017 · J Vista, Subrahmanyam Perumalla, et al. · International Conference on Computer Communication and Informatics (ICCCI)
Works count: 14
Citation count: 433
H-index: 9
I10-index: 9
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