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JungHo Do

Observed names: J. Do, J.H. Do, Jaehong Do, Jungho Do
ORCID: 0000-0001-6371-7429
Observed ORCID: 0000-0001-6371-7429
OpenAlex ID: A5019245577
Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
2021 · H. Jagannathan, B. Anderson, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 74
True 7nm Platform Technology featuring Smallest FinFET and Smallest SRAM cell by EUV, Special Constructs and 3rd Generation Single Diffusion Break
2018 · W.C. Jeong, D.J. Kwon, et al. · Symposium on VLSI Technology · 53
Analytical Parasitic Resistance and Capacitance Models for Nanosheet Field-Effect Transistors
2023 · Junha Suk, Yohan Kim, et al. · IEEE Transactions on Electron Devices · 13
Highly Manufacturable Low Power and High Performance 11LPP Platform Technology for Mobile and GPU Applications
2018 · H.-J. Kim, B.H. Choi, et al. · Symposium on VLSI Technology · 6
A 212.5Gb/s Pam-4 Receiver With Mutual Inductive Coupled Gm-Tia in 4nm Finfet
2025 · Kibaek Kwon, Hyungdong Roh, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
A Process-Aware Analytical Gate Resistance Model for Nanosheet Field-Effect Transistors
2024 · Junha Suk, Yohan Kim, et al. · IEEE Journal of the Electron Devices Society
Works count: 6
Citation count: 146
H-index: 4
I10-index: 3
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