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Ashish Sachdeva
Institution:
Maharishi Markandeshwar University, Mullana
Observed institutions:
Chandigarh University,
Maharishi Markandeshwar University, Mullana,
Netaji Subhas University of Technology,
Manav Rachna University,
Manav Rachna International Institute of Research and Studies,
Chitkara University,
GLA University
show all 7
ORCID:
0000-0003-2434-5073
Observed ORCID:
0000-0003-2434-5073
OpenAlex ID:
A5019812316
Hyperspectral imaging and its applications: A review
2024
·
Anuja Bhargava
, Ashish Sachdeva
, et al.
·
Heliyon
·
371
A carbon nano-tube field effect transistor based stable, low-power 8T static random access memory cell with improved write access time
2023
·
Ashish Sachdeva
, Deepak Kumar
, et al.
·
AEU - International Journal of Electronics and Communications
·
80
Design of 10T SRAM cell with improved read performance and expanded write margin
2020
·
Ashish Sachdeva
, V. K. Tomar
·
IET Circuits Devices & Systems
·
56
Design of a Stable Low Power 11-T Static Random Access Memory Cell
2020
·
Ashish Sachdeva
, V. K. Tomar
·
Journal of Circuits Systems and Computers
·
55
Design of multi-cell upset immune single-end SRAM for low power applications
2020
·
Ashish Sachdeva
, V.K. Tomar
·
AEU - International Journal of Electronics and Communications
·
45
A CNTFET Based Bit-Line Powered Stable SRAM Design for Low Power Applications
2023
·
Ashish Sachdeva
, Lipika Gupta
, et al.
·
ECS Journal of Solid State Science and Technology
·
41
PDF
A Schmitt-trigger based low read power 12T SRAM cell
2020
·
Ashish Sachdeva
, V. K. Tomar
·
Analog Integrated Circuits and Signal Processing
·
41
Design of Low Power Half Select Free 10T Static Random-Access Memory Cell
2020
·
Ashish Sachdeva
, V. K. Tomar
·
Journal of Circuits Systems and Computers
·
37
Low ‐power FinFET based boost converter design using dynamic threshold body biasing technique
2023
·
Kulbhushan Sharma
, Sandeep Thakur
, et al.
·
International Journal of Numerical Modelling Electronic Networks Devices and Fields
·
36
Read Improved and Low Leakage Power CNTFET Based Hybrid 10t SRAM Cell for Low Power Applications
2023
·
M. Elangovan
, Kulbhushan Sharma
, et al.
·
Circuits Systems and Signal Processing
·
29
Characterisation of graphene nano-ribbon field effect transistor and design of high performance PPN 12T GNRFET Full adder
2023
·
M Elangovan
, Kulbhushan Sharma
, et al.
·
Physica Scripta
·
28
A CNTFET based stable, single-ended 7T SRAM cell with improved write operation
2024
·
Ashish Sachdeva
, Kulbhushan Sharma
, et al.
·
Physica Scripta
·
25
A low-power SRAM design with enhanced stability and I ON /I OFF ratio in FinFET technology for wearable device applications
2023
·
Erfan Abbasian
, Shilpi Birla
, et al.
·
International Journal of Electronics
·
24
Highly-Efficient CNTFET-Based Unbalanced Ternary Logic Gates
2023
·
Erfan Abbasian
, Sobhan Sofimowloodi
, et al.
·
ECS Journal of Solid State Science and Technology
·
24
A FinFET Based Low-Power Write Enhanced SRAM Cell With Improved Stability
2024
·
Atharv Sharma
, Kulbhushan Sharma
, et al.
·
AEU - International Journal of Electronics and Communications
·
23
A low-power low-noise amplifier with high CMRR for wearable healthcare applications
2023
·
Kulbhushan Sharma
, Sundram Singh
, et al.
·
AEU - International Journal of Electronics and Communications
·
23
Design and parametric characterization of CNTFET based stable static random access memory bit-cell for low-power applications
2024
·
Divyansh Yadav
, Anuja Bhargava
, et al.
·
AEU - International Journal of Electronics and Communications
·
22
Design of a soft error hardened SRAM cell with improved access time for embedded systems
2022
·
V.K. Tomar
, Ashish Sachdeva
·
Microprocessors and Microsystems
·
22
Characterization of Stable 12T SRAM with Improved Critical Charge
2021
·
Ashish Sachdeva
, V. K. Tomar
·
Journal of Circuits Systems and Computers
·
22
A Multi-bit Error Upset Immune 12T SRAM Cell for 5G Satellite Communications
2021
·
Ashish Sachdeva
, V. K. Tomar
·
Wireless Personal Communications
·
22
A soft-error resilient low power static random access memory cell
2021
·
Ashish Sachdeva
, V. K. Tomar
·
Analog Integrated Circuits and Signal Processing
·
21
Design and Simulation of Cascode Current reuse low power Operational transconductance amplifier
2023
·
Ravi Ranjan Kumar
, Kulbhushan Sharma
, et al.
·
Devices for Integrated Circuit (DevIC)
·
20
Low Power Static Random-Access Memory Cell Design for Mobile Opportunistic Networks Sensor Nodes
2022
·
Ashish Sachdeva
·
Journal of Circuits Systems and Computers
·
19
Design of power efficient and reliable hybrid inverter approach based 11 T SRAM design using GNRFET technology
2024
·
M. Elangovan
, Kulbhushan Sharma
, et al.
·
AEU - International Journal of Electronics and Communications
·
18
CNTFET-based design of low power charge pump technique-based voltage multiplier
2023
·
Ricky Rajora
, Kulbhushan Sharma
, et al.
·
Devices for Integrated Circuit (DevIC)
·
16
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Works count:
64
Citation count:
1,326
H-index:
21
I10-index:
36
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