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Sangeeta Singh

Design and Implementation of a Low-Power, High-Speed Comparator
2015 · V. Deepika, Sangeeta Singh · Procedia Materials Science · 11
Power and area calibration of switch arbiter for high speed switch control and scheduling in network-on-chip
2016 · Sangeeta Singh, Jvr Ravindra, et al. · International SoC Design Conference · 9
VLSI Implementation of Parallel CRC Using Pipelining, Unfolding and Retiming
2013 · Sangeeta Singh · IOSR Journal of VLSI and Signal processing · 9
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Read and Write Stability of 6T SRAM
2014 · Sangeeta Singh, Vikky Lakhmani · 8
Side lobe blanking in active phased array antenna
2023 · Pramod Kumar, Brajesh Kumar, et al. · IEEE Microwaves, Antennas, and Propagation Conference (MAPCON) · 3
RETRACTED: Design and implementation of network‐on‐chip router using multi‐priority based iterative round‐robin matching with slip
2022 · Sangeeta Singh, J. V. R. Ravindra, et al. · Transactions on Emerging Telecommunications Technologies · 3
Transient Analysis & Performance Estimation of Gate Inside Junctionless Transistor (GI-JLT)
2015 · Sangeeta Singh, Pankaj Kumar, et al. · Zenodo (CERN European Organization for Nuclear Research) · 3
Proffering Secure Energy Aware Network-On-Chip (Noc) Using Incremental Cryptogine
2022 · Sangeeta Singh, JVR Ravindra, et al. · Sustainable Computing Informatics and Systems · 2
Design and Analysis of a Novel Low Complexity and Low Power Ping Lock Arbiter by using EGDI based CMOS Technique
2022 · Sangeeta Singh, JVR Ravindra, et al. · International Journal of Integrated Engineering · 1
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Calculation of Performance Parameters of Different SRAMs
2013 · Sangeeta Singh · 1
Optimization of Construction Scheduling using Dynamic Programming
2025 · Vishal Chauhan, Anorgul Ashirova, et al. · International Conference on Soft Computing for Security Applications (ICSCSA)
Differential Cascode Voltage Switch Logic (DCVSL) Level Shifter with Logic Error Detection
2025 · Azmath Noorain, G. Sanjeeva Reddy, et al. · Lecture notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering
Synergizing Edge Computing With Energy Storage and Grid Integration in Electric Vehicles
2024 · G. Shashibhushan, Krishnaiah Narukulla, et al. · Advances in mechatronics and mechanical engineering (AMME) book series
Design and Implementation of Comparator Using GDI Decoder
2023 · Sangeeta Singh, T. Akankhsa, et al. · Lecture notes in electrical engineering
Power and Delay Analysis of Adders for High-Speed Error Tolerant Applications
2021 · Sangeeta Singh, Gandi Ajay Kumar, et al.
Analysis of 8-bit prefix parallel binary comparator based on 3 to 1 merging circuit
2021 · P. Anil Kumar, M. Sudhakar Rao, et al. · AIP conference proceedings
Performance Analysis and Low Power Design of Voltage Level-up Shifters
2018 · B. Srikanth, Rameswari Nayak, et al. · International Journal of Engineering & Technology
Low Power Double Gate Fin FET Based Sense Amplifier
2015 · Pallavi Priyadarshni, S.N. Singh · IJARCCE
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VLSI Implementation of Parallel CRC Using Pipelining, Unfolding and Retiming
2014 · Iosr Journals, Singh, Sangeeta, et al. · Figshare
ASIC Implementation Of Reed Solomon Codec For Burst Error Detection And Correction
2013 · Sangeeta Singh, S. Sujana
Works count: 20
Citation count: 50
H-index: 4
I10-index: 1
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