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Pooja Srivastava

ORCID: 0000-0002-0103-6836
Observed ORCID: 0000-0002-0103-6836
OpenAlex ID: A5022105085
Design and analysis of RF MEMS Varactor for extended tuning range
2013 · Prachi Gupta, Prashant Singh, et al. · International Conference on Control, Computing, Communication and Materials (ICCCCM) · 10
Analysis of Nanoscale Short Channel Effects in Cylindrical Gate-All-Around Junctionless FETs and Performance Enhancement with GaAs and III–V Materials for Low-Power, High Frequency Applications
2025 · Pooja Srivastava, Aditi Upadhyaya, et al. · Electronics · 8
Performance evaluation of Speex audio codec for wireless communication networks
2011 · Pooja Srivastava, Kishore Babu, et al. · IFIP International Conference on Wireless and Optical Communications Networks (WOCN) · 7
Investigation of Short Channel Effects in Al0.30Ga0.60As Channel-Based Junctionless Cylindrical Gate-All-Around FET for Low Power Applications
2025 · Pooja Srivastava, Aditi Upadhyaya, et al. · Journal of Low Power Electronics and Applications · 5
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Performance Evaluation of Junctionless Cylindrical Gate-All-Around FET for Low Power Applications
2024 · Pooja Srivastava, Aditi Upadhyaya, et al. · Semiconductor Science and Information Devices · 4
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Performance Evaluation of VLSI Implemented WSN Algorithms
2020 · Pooja Srivastava, S. C. Bose · Advances in intelligent systems and computing · 1
Performance Evaluation of Nano-transistors with III-V Channel Materials for Space Applications
2026 · Pooja Srivastava, Arvind Kumar Singh, et al. · Journal of Condensed Matter
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Performance Analysis of Nanotransistors with III-V Channel Materials for Thermophysical Effects
2026 · Pooja Srivastava, Arvind Kumar Singh, et al. · Journal of Condensed Matter
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Future Applications of Junctionless Transistors Using Gallium Phosphide Channel for the Semiconductor Industry
2025 · Pooja Srivastava, Aditi Upadhyaya, et al. · CRC Press eBooks
HfO2/SiO2 spacer oxide width optimization for enhanced terahertz performance and short-channel integrity in sub-nm silicon based junctionless dual metal gate-all-around FET architectures: A TCAD approach
2025 · Shekhar Yadav, Pooja Srivastava, et al. · Nano Trends
Gallium Nitride Channel-Based Junctionless Transistors for Futuristics Power Electronics Energy Applications
2025 · Pooja Srivastava, Aditi Upadhyaya, et al. · Springer proceedings in physics
Simulated Analysis of Double-Gate MOSFET and FinFET Structure Using High-k Materials
2021 · Pooja Srivastava, S. C. Bose · Communications in computer and information science
Multiscale simulation of Schottky barrier tunnel transistors
2015 · Mincheol Shin, Pooja Srivastava, et al.
Performance Evaluation and Comparative Study of Different High-K Poly-Si and Metal Gate Stack in MO SFET
2015 · Seema Verma, Pooja Srivastava, et al.
Performance Evaluation and Comparison of Ultra-thin Bulk (UTB), Partially Depleted and Fully Depleted SOI MOSFET using Silvaco
2015 · Seema Verma, Pooja Srivastava, et al.
A Review Paper on Comparative Study of FPGA Implemented AES, Rijndael AES and Pipelined AES Algorithms for Secure Adhoc Networks
2014 · Pooja Srivastava, Seema Verma, et al. · INTERNATIONAL JOURNAL OF MANAGEMENT & INFORMATION TECHNOLOGY
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A Review Paper on Comparative Study of FPGA Implementation of Adhoc Security Algorithms
2013 · Dr. Seema Verma, Pooja Srivastava, et al. · INTERNATIONAL JOURNAL OF MANAGEMENT & INFORMATION TECHNOLOGY
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A Concept Paper on Performance Trade-offs of Security Algorithms for Adhoc Networks
2013 · Pooja Srivastava, Seema Verma
Works count: 18
Citation count: 35
H-index: 4
I10-index: 1
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