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Author

Magnus Själander

Observed names: M. Sjalander, Magnus Sjalander, Mägnus Sjalander, Sjalander Magnus, Sjalander, Magnus, Själander, Magnus
ORCID: 0000-0003-4232-6976
Observed ORCID: 0000-0003-4232-6976
OpenAlex ID: A5024358692
EPIC: An Energy-Efficient, High-Performance GPGPU Computing Research Infrastructure
2019 · Själander, Magnus, Jahre, Magnus, et al. · arXiv (Cornell University) · 131
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BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
2018 · Yaman Umuroglu, Lahiru Rasnayake, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 114
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Efficient invisible speculative execution through selective delay and value prediction
2019 · Christos Sakalis, Stefanos Kaxiras, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings · 105
Twig: Multi-Agent Task Management for Colocated Latency-Critical Cloud Services
2020 · Rajiv Nishtala, Vinicius Petrucci, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 75
A High-Speed, Energy-Efficient Two-Cycle Multiply-Accumulate (MAC) Architecture and Its Application to a Double-Throughput MAC Unit
2010 · Tung Thanh Hoang, Magnus Sjalander, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 70
High-speed and low-power multipliers using the Baugh-Wooley algorithm and HPM reduction tree
2008 · Magnus Sjalander, Per Larsson-Edefors · IEEE International Conference on Electronics, Circuits and Systems (ICECS) · 59
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing
2008 · Martin Thuresson, Magnus Själander, et al. · Journal of Signal Processing Systems · 55
Multiplication Acceleration Through Twin Precision
2009 · M. Sjalander, P. Larsson-Edefors · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 49
Multiplier Reduction Tree with Logarithmic Logic Depth and Regular Connectivity
2006 · H. Eriksson, P. Larsson-Edefors, et al. · IEEE International Symposium on Circuits and Systems proceedings · 41
A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures
2008 · Magnus Själander, Andrei Terechko, et al. · Euromicro Conference on Digital System Design (DSD) · 40
An LTE Uplink Receiver PHY benchmark and subframe-based power management
2012 · Magnus Sjalander, Sally A. McKee, et al. · IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) · 38
Clairvoyance: Look-ahead compile-time scheduling
2017 · Kim-Anh Tran, Trevor E. Carlson, et al. · Proceedings of the CGO/Proceedings of the ... CGO · 31
An efficient twin-precision multiplier
2004 · M. Sjalander, H. Eriksson, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 28
Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing
2019 · Yaman Umuroglu, Davide Conficconi, et al. · ACM Transactions on Reconfigurable Technology and Systems · 24
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Ghost loads: what is the cost of invisible speculation?
2019 · Christos Sakalis, Mehdi Alipour, et al. · ACM International Conference on Computing Frontiers (CF) · 24
A Low-Leakage Twin-Precision Multiplier Using Reconfigurable Power Gating
2005 · M. Sjalander, M. Drazdziulis, et al. · IEEE International Symposium on Circuits and Systems proceedings · 24
Techniques to Measure, Model, and Manage Power
2012 · Bhavishya Goel, Sally A. McKee, et al. · Advances in computers · 22
flatspin: A large-scale artificial spin ice simulator
2022 · Johannes H. Jensen, Anders Strømberg, et al. · Physical review. B./Physical review. B · 20
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Power-Efficient Computer Architectures: Recent Advances
2014 · Magnus Själander, Margaret Martonosi, et al. · Synthesis lectures on computer architecture · 20
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing
2007 · Martin Thuresson, Magnus Sjalander, et al. · International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation · 20
Understanding Selective Delay as a Method for Efficient Secure Speculative Execution
2020 · Christos Sakalis, Stefanos Kaxiras, et al. · IEEE Transactions on Computers · 19
Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions
2021 · Pavlos Aimoniotis, Christos Sakalis, et al. · IEEE Computer Architecture Letters · 17
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A Flexible Code Compression Scheme Using Partitioned Look-Up Tables
2008 · Martin Thuresson, Magnus Själander, et al. · Lecture notes in computer science · 16
The Case for HPM-Based Baugh-Wooley Multipliers
2008 · Magnus Själander, Per Larsson-Edefors · Chalmers Publication Library (Chalmers University of Technology) · 16
Clearing the Shadows: Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design
2020 · Kim-Anh Tran, Christos Sakalis, et al. · International Conference on Parallel Architectures and Compilation Techniques (PACT) · 15
Works count: 135
Citation count: 1,402
H-index: 20
I10-index: 35
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