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Raphael Polig

Observed names: Polig Raphael, Polig, Raphael, R. Polig
OpenAlex ID: A5026275592
Network-attached FPGAs for data center applications
2016 · Jagath Weerasinghe, Raphael Polig, et al. · International Conference on Field-Programmable Technology (FPT) · 82
Formal Techniques for Effective Co-verification of Hardware/Software Co-designs
2017 · Rajdeep Mukherjee, Mitra Purandare, et al. · ACM/IEEE Design Automation Conference (DAC) · 33
Hardware-accelerated regular expression matching for high-throughput text analytics
2013 · Kubilay Atasu, Raphael Polig, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 25
Accelerating arithmetic kernels with coherent attached FPGA coprocessors
2015 · Heiner Giefers, Raphael Polig, et al. · Design, Automation, and Test in Europe · 19
Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system
2014 · Heiner Giefers, Raphael Polig, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 15
A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware
2015 · C.M. Angerer, R. Polig, et al. · Sustainable Computing Informatics and Systems · 12
Compiling text analytics queries to FPGAs
2014 · Raphael Polig, Kubilay Atasu, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 12
Accelerating Arithmetic Kernels with Coherent Attached FPGA Coprocessors
2015 · Heiner Giefers, Raphael Polig, et al. · Design, Automation, and Test in Europe · 11
Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
2021 · Dionysios Diamantopoulos, Raphael Polig, et al. · IEEE ... International Conference on Cloud Computing · 8
Token-based dictionary pattern matching for text analytics
2013 · Raphael Polig, Kubilay Atasu, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 8
A hardware compilation framework for text analytics queries
2017 · Raphael Polig, Kubilay Atasu, et al. · Journal of Parallel and Distributed Computing · 7
Energy-efficient stochastic matrix function estimator for graph analytics on FPGA
2016 · Heiner Giefers, Peter Staar, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 6
A high-speed and large-scale dictionary matching engine for Information Extraction systems
2013 · Kanak Agarwal, Raphael Polig · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 6
Accelerated analysis of Boolean gene regulatory networks
2017 · Mitra Purandare, Raphael Polig, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 5
Exploring the design space of programmable regular expression matching accelerators
2013 · Kubilay Atasu, Raphael Polig, et al. · Journal of Systems Architecture · 5
FPGA Accelerated Analysis of Boolean Gene Regulatory Networks
2019 · Matteo Manica, Raphael Polig, et al. · IEEE Transactions on Computational Biology and Bioinformatics · 4
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A soft-core processor array for relational operators
2015 · Raphael Polig, Heiner Giefers, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 4
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach
2024 · Christian Pilato, Subhadeep Banik, et al. · Design, Automation, and Test in Europe · 3
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Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT
2015 · Heiner Giefers, Raphael Polig, et al. · Journal of Signal Processing Systems · 3
RESTful Web Services on Standalone Disaggregated FPGAs
2017 · Raphael Polig, Jagath Weerasinghe, et al. · IEEE International Conference on Cloud Computing Technology and Science · 1
Text Analytics on Reconfigurable Platforms
2015 · Raphael Polig · mediaTUM – the media and publications repository of the Technical University Munich (Technical University Munich) · 1
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Acceleration-as-a-μService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
2021 · Diamantopoulos, Dionysios, Polig, Raphael, et al. · arXiv (Cornell University)
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RESTful Web Services on Standalone Disaggregated FPGAs
2021 · Raphael Polig, Jagath Weerasinghe, et al.
RESTful Web Services on Standalone Disaggregated FPGAs
2021 · Raphael Polig, Jagath Weerasinghe, et al.
PDF
Annotation-based finite-state transducers on reconfigurable devices
2016 · Raphael Polig, Kubilay Atasu, et al. · International Conference on Field Programmable Logic and Applications (FPL)
Works count: 27
Citation count: 270
H-index: 8
I10-index: 8
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