Author

Erik Rosseel

Observed names: E Rosseel, E. Rosseel, Erik Rosseel Erik Rosseel, Rosseel, E., Rosseel, Erik

Institution: IMEC

Observed institutions: Université Libre de Bruxelles, Vrije Universiteit Brussel, Imec the Netherlands, Technische Universität Darmstadt, IMEC, Industrial Technology Research Institute, KLA (United States), KU Leuven

ORCID: 0000-0002-2737-8391

Observed ORCID: 0000-0002-2737-8391

OpenAlex ID: A5029989684

Pinning by an antidot lattice: The problem of the optimum antidot size

1998 · V. V. Moshchalkov, M. Baert, et al. · Physical review. B, Condensed matter · 222

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

2016 · H. Mertens, R. Ritzenthaler, et al. · IEEE Symposium on VLSI Technology · 206

Magnetization of multiple-quanta vortex lattices

1996 · V. V. Moshchalkov, M. Baert, et al. · Physical review. B, Condensed matter · 201

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

2016 · H. Mertens, R. Ritzenthaler, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 173

First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers

2020 · S. Subramanian, M. Hosseini, et al. · IEEE Symposium on VLSI Technology · 130

Shapiro steps in a superconducting film with an antidot lattice

1999 · L. Van Look, E. Rosseel, et al. · Physical review. B, Condensed matter · 115

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Depinning of caged interstitial vortices in superconducting a - WGe films with an antidot lattice

1996 · E. Rosseel, M. Van Bael, et al. · Physical review. B, Condensed matter · 98

Multiring Circular Transmission Line Model for Ultralow Contact Resistivity Extraction

2015 · Hao Yu, Marc Schaekers, et al. · IEEE Electron Device Letters · 78

Titanium Silicide on Si:P With Precontact Amorphization Implantation Treatment: Contact Resistivity Approaching $1 \times 10^{-9}$ Ohm-cm2

2016 · Hao Yu, Marc Schaekers, et al. · IEEE Transactions on Electron Devices · 62

Supermatching vortex phases in superconducting thin films with antidot lattices

1998 · V. V Metlushko, L. E DeLong, et al. · Europhysics Letters (EPL) · 57

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Atomic Layer Deposition of Gd-Doped HfO[sub 2] Thin Films

2010 · C. Adelmann, H. Tielens, et al. · Journal of The Electrochemical Society · 53

Surface and grain boundary scattering studied in beveled polycrystalline thin copper films

2004 · W. Zhang, S. H. Brongersma, et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 53

Review of electrical characterization of ultra-shallow junctions with micro four-point probes

2010 · Dirch H. Petersen, Ole Hansen, et al. · Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena · 52

(Invited) Vertical Nanowire FET Integration and Device Aspects

2016 · Anabela Veloso, Efraín Altamirano-Sánchez, et al. · ECS Transactions · 51

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1.5×10−9 Ωcm2 Contact resistivity on highly doped Si:P using Ge pre-amorphization and Ti silicidation

2015 · H. Yu, M. Schaekers, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 48

(Invited) Selective Epitaxial Growth of High-P Si:P for Source/Drain Formation in Advanced Si nFETs

2016 · Erik Rosseel, Sathish Kumar Dhayalan, et al. · ECS Transactions · 46

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Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs

2014 · Erik Rosseel, Harald Benjamin Profijt, et al. · ECS Transactions · 46

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Comparative study of size dependent four-point probe sheet resistance measurement on laser annealed ultra-shallow junctions

2008 · Dirch Hjorth Petersen, Rong Lin, et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 44

Vertical Nanowire and Nanosheet FETs: Device Features, Novel Schemes for Improved Process Control and Enhanced Mobility, Potential for Faster & More Energy Efficient Circuits

2019 · A. Veloso, G. Eneman, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 42

Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling

2020 · Anshul Gupta, Olalla Varela Pedreira, et al. · IEEE Transactions on Electron Devices · 41

Junctionless gate-all-around lateral and vertical nanowire FETs with simplified processing for advanced logic and analog/RF applications and scaled SRAM cells

2016 · A. Veloso, B. Parvais, et al. · IEEE Symposium on VLSI Technology · 39

Vortex configurations in a Pb/Cu microdot with a 2×2 antidot cluster

1998 · T. Puig, E. Rosseel, et al. · Physical review. B, Condensed matter · 39

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Stable vortex configurations in superconducting 2×2 antidot clusters

1997 · T. Puig, E. Rosseel, et al. · Applied Physics Letters · 39

Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures