Author

K. Abdul Munaf

Observed names: K Abdul Munaf, K. Abdul Munaf

Institution: Rajiv Gandhi University of Knowledge Technologies

Observed institutions: Sri Venkateswara University, Indian Institute of Information Technology Design and Manufacturing, Kurnool, Rajiv Gandhi University of Knowledge Technologies

ORCID: 0009-0008-4254-4395

Observed ORCID: 0009-0008-4254-4395

OpenAlex ID: A5030740258

A simultaneous area, delay and leakage current reduction method for Linear Feedback Shift Register (LFSR) using pulsed latches and DTMOS transistors

2024 · K. Abdul Munaf, T. Ramashri · e-Prime - Advances in Electrical Engineering Electronics and Energy · 4

Design and optimization of power management circuits for low-power VLSI systems

2023 · T. Ramashri, A. Ananthi Christy, et al. · International Conference on Innovative Computing, Intelligent Communication and Smart Electrical Systems (ICSES) · 3

Retracted: Design and Optimization of Low Power and High-Performance CMOS Circuits

2023 · Keerthi Kumar N, N.K Anushkannan, et al. · International Conference on Smart Electronics and Communication (ICOSEC) · 2

FPGA Implementation of Area-Efficient Binary Counter Using Xilinx IP Cores

2022 · B. Khaleelu Rehman, Ramalla Isaac, et al. · Lecture notes in civil engineering · 2

FPGA based Morse Code Communication System using UART and 7-Segment Display

2025 · K. Abdul Munaf, G. Bhuvaneswar, et al. · Zenodo (CERN European Organization for Nuclear Research)

Retraction Notice: Design and Optimization of Low Power and High-Performance CMOS Circuits

2023 · Keerthi Kumar N, N.K Anushkannan, et al. · International Conference on Smart Electronics and Communication (ICOSEC)

Works count: 6

Citation count: 11

H-index: 2

I10-index: