Author

James D. Balfour

Observed names: J. Balfour, James Balfour, James David Balfour

Observed institutions: Google (United States), Nvidia (United States), Stanford SystemX Alliance, Stanford University

OpenAlex ID: A5030954564

A detailed and flexible cycle-accurate Network-on-Chip simulator

2013 · Nan Jiang, James Balfour, et al. · IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) · 799

Design tradeoffs for tiled CMP on-chip networks

2006 · James Balfour, William J. Dally · International Conference on Supercomputing · 505

Flattened Butterfly Topology for On-Chip Networks

2007 · John Kim, James Balfour, et al. · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · 239

Efficient Embedded Computing

2008 · William J. Dally, James Balfour, et al. · Computer · 159

Elastic-buffer flow control for on-chip networks

2009 · George Michelogiannakis, James Balfour, et al. · Proceedings - International Symposium on High-Performance Computer Architecture/Proceedings · 96

Flattened Butterfly Topology for On-Chip Networks

2007 · J. Kim, J. Balfour, et al. · IEEE Computer Architecture Letters · 86

An Energy-Efficient Processor Architecture for Embedded Systems

2008 · J. Balfour, W.J. Dally, et al. · IEEE Computer Architecture Letters · 54

Design tradeoffs for tiled CMP on-chip networks

2014 · James Balfour, William J. Dally · 35

Operand Registers and Explicit Operand Forwarding

2009 · James Balfour, Richard Harting, et al. · IEEE Computer Architecture Letters · 24

Flattened Butterfly Topology for On-Chip Networks

2007 · John Kim, James Balfour, et al. · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · 15

2008 · Jongsoo Park, Sung-boem Park, et al. · 14

Hierarchical Instruction Register Organization

2008 · D. Black-Schaffer, J. Balfour, et al. · IEEE Computer Architecture Letters · 10

2007 · JongSoo Park, Sung-Boem Park, et al. · Design, Automation, and Test in Europe · 10

Fine-grain dynamic instruction placement for L0 scratch-pad memory

2010 · Jongsoo Park, James Balfour, et al. · International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) · 6

Embracing Heterogeneity — Parallel Programming for Changing Hardware

2009 · Michael D. Linderman, James Balfour, et al. · 5

Author retrospective for design tradeoffs for tiled CMP on-chip networks

2014 · William J. Dally, James Balfour · 1

Structured Application-Specific Integrated Circuit (ASIC) Study

2008 · William J. Dally, James Balfour, et al. · Defense Technical Information Center (DTIC)

Works count: 23

Citation count: 2,058

H-index: 11

I10-index: 13