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Anand Bulusu

Impact of Random Spatial Fluctuation in Non-Uniform Crystalline Phases on the Device Variation of Ferroelectric FET
2021 · Chirag Garg, Nitanshu Chauhan, et al. · IEEE Electron Device Letters · 66
A Highly Reliable and Energy-Efficient Triple-Node-Upset-Tolerant Latch Design
2019 · Chaudhry Indra Kumar, Bulusu Anand · IEEE Transactions on Nuclear Science · 58
Two dimensional analytical modeling for asymmetric 3T and 4T double gate tunnel FET in sub-threshold region: Potential and electric field
2013 · Menka Yadav, Anand Bulusu, et al. · Microelectronics Journal · 54
Vertical Silicon Nanowire Gate-All-Around Field Effect Transistor Based Nanoscale CMOS
2011 · Satish Maheshwaram, S. K. Manhas, et al. · IEEE Electron Device Letters · 42
A Highly Reliable and Energy Efficient Radiation Hardened 12T SRAM Cell Design
2019 · Chaudhry Indra Kumar, Bulusu Anand · IEEE Transactions on Device and Materials Reliability · 38
Impact of Gate–Source Overlap on the Device/Circuit Analog Performance of Line TFETs
2019 · Abhishek Acharya, A. B. Solanki, et al. · IEEE Transactions on Electron Devices · 33
Effect of Load Capacitance and Input Transition Time on FinFET Inverter Capacitances
2014 · Archana Pandey, Swati Raycha, et al. · IEEE Transactions on Electron Devices · 32
Vertical Nanowire CMOS Parasitic Modeling and its Performance Analysis
2013 · Satish Maheshwaram, S. K. Manhas, et al. · IEEE Transactions on Electron Devices · 31
Drain Current Saturation in Line Tunneling-Based TFETs: An Analog Design Perspective
2017 · Abhishek Acharya, Abhishek B. Solanki, et al. · IEEE Transactions on Electron Devices · 29
Negative-to-Positive Differential Resistance Transition in Ferroelectric FET: Physical Insight and Utilization in Analog Circuits
2021 · Nitanshu Chauhan, Navjeet Bagga, et al. · IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control · 24
A New Aspect of Saturation Phenomenon in FinFETs and Its Implication on Analog Circuits
2019 · Shashank Banchhor, Kintada Dinesh Kumar, et al. · IEEE Transactions on Electron Devices · 21
Multi-Bit Compute-In Memory Architecture Using a C-2C Ladder Network
2023 · Dinesh Kushwaha, Jaya Kumar Abotula, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 20
Compact NBTI Reliability Modeling in Si Nanowire MOSFETs and Effect in Circuits
2017 · Om Prakash, Swen Beniwal, et al. · IEEE Transactions on Device and Materials Reliability · 20
Efficient nanoscale VLSI standard cell library characterization using a novel delay model
2011 · Sandeep Miryala, Baljit Kaur, et al. · International Symposium on Quality Electronic Design (ISQED) · 18
BOX engineering to mitigate negative differential resistance in MFIS negative capacitance FDSOI FET: an analog perspective
2021 · Nitanshu Chauhan, Navjeet Bagga, et al. · Nanotechnology · 17
Effective Drive Current for Near-Threshold CMOS Circuits’ Performance Evaluation: Modeling to Circuit Design Techniques
2018 · Arvind Sharma, Naushad Alam, et al. · IEEE Transactions on Electron Devices · 17
Investigation of Trap-Induced Performance Degradation and Restriction on Higher Ferroelectric Thickness in Negative Capacitance FDSOI FET
2021 · Chirag Garg, Nitanshu Chauhan, et al. · IEEE Transactions on Electron Devices · 16
Multidomain Negative Capacitance Effect in P(VDF-TrFE) Ferroelectric Capacitor and Passive Voltage Amplification
2020 · Khoirom Johnson Singh, Anand Bulusu, et al. · IEEE Transactions on Electron Devices · 16
Multifinger MOSFETs’ Optimization Considering Stress and INWE in Static CMOS Circuits
2016 · Arvind Sharma, Naushad Alam, et al. · IEEE Transactions on Electron Devices · 16
An Energy-Efficient High CSNR XNOR and Accumulation Scheme for BNN
2022 · Dinesh Kushwaha, Ashish Joshi, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 15
Efficient ECSM Characterization Considering Voltage, Temperature, and Mechanical Stress Variability
2014 · Baljit Kaur, Naushad Alam, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 15
A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing
2022 · Dinesh Kushwaha, Aditya Sharma, et al. · IEEE International Symposium on Circuits and Systems proceedings · 14
Effective Current Model for Inverter-Transmission Gate Structure and Its Application in Circuit Design
2017 · Arvind Sharma, Naushad Alam, et al. · IEEE Transactions on Electron Devices · 14
A Novel ${{V}}_{\textsf {DSAT}}$ Extraction Method for Tunnel FETs and Its Implication on Analog Design
2016 · Abhishek Acharya, Sudeb Dasgupta, et al. · IEEE Transactions on Electron Devices · 14
An Energy-Efficient Multi-bit Current-based Analog Compute-In-Memory Architecture and design Methodology
2023 · Dinesh Kushwaha, Ashish Joshi, et al. · International Conference on VLSI Design · 13
Works count: 171
Citation count: 1,070
H-index: 16
I10-index: 35
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