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Shiromani Balmukund Rahi

Observed names: Rahi SB, Rahi, Shiromani Balmukund, S. B. Rahi, S.B. Rahi, Shiromani Bal Mukund Rahi, Siromani Balmukund Rahi
ORCID: 0000-0003-3941-8570
Observed ORCID: 0000-0003-3941-8570
OpenAlex ID: A5032538672
A review on emerging negative capacitance field effect transistor for low power electronics
2021 · Shiromani Balmukund Rahi, Shubham Tayal, et al. · Microelectronics Journal · 85
Heterogate junctionless tunnel field-effect transistor: future of low-power devices
2016 · Shiromani Balmukund Rahi, Pranav Asthana, et al. · Journal of Computational Electronics · 72
Recent progress on negative capacitance tunnel FET for low-power applications: Device perspective
2022 · Abhishek Kumar Upadhyay, Shiromani Balmukund Rahi, et al. · Microelectronics Journal · 53
Temperature effect on hetero structure junctionless tunnel FET
2015 · Shiromani Balmukund Rahi, Bahniman Ghosh, et al. · Journal of Semiconductors · 42
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Improved performance of a junctionless tunnel field effect transistor with a Si and SiGe heterostructure for ultra low power applications
2015 · Pranav Kumar Asthana, Yogesh Goswami, et al. · RSC Advances · 37
High-k double gate junctionless tunnel FET with a tunable bandgap
2015 · Shiromani Balmukund Rahi, Bahniman Ghosh · RSC Advances · 37
Incorporating Bottom-Up Approach Into Device/Circuit Co-Design for SRAM-Based Cache Memory Applications
2022 · Shubham Tayal, Billel Smaani, et al. · IEEE Transactions on Electron Devices · 35
Identifying the moderating effect of trust on the adoption of cloud‐based services
2017 · Shiromani Balmukund Rahi, Sandip Bisui, et al. · International Journal of Communication Systems · 33
Optimal design for a high performance H-JLTFET using HfO 2 as a gate dielectric for ultra low power applications
2014 · Pranav Kumar Asthana, Bahniman Ghosh, et al. · RSC Advances · 32
Low Power Circuit and System Design Hierarchy and Thermal Reliability of Tunnel Field Effect Transistor
2021 · Guenifi Naima, Shiromani Balmukund Rahi · Silicon · 31
A simulation-based proposed high-k heterostructure AlGaAs/Si junctionless n-type tunnel FET
2014 · Shiromani Balmukund Rahi, Bahniman Ghosh, et al. · Journal of Semiconductors · 30
Handbook of Emerging Materials for Semiconductor Industry
2024 · Young Suh Song, Laxman Raju Thoutam, et al. · Springer eBooks · 26
Thermal-Aware IC Chip Design by Combining High Thermal Conductivity Materials and GAA MOSFET
2022 · Young Suh Song, Shubham Tayal, et al. · International Conference on Circuits, Systems and Simulation (ICCSS) · 24
Rigorous Study of Double Gate Tunneling Field Effect Transistor Structure Based on Silicon
2018 · N. Guenifi, S. B. Rahi, et al. · Materials Focus · 22
Impact of the Self-Heating Effect on Nanosheet Field Effect Transistor Performance
2023 · Billel Smaani, Neha Paras, et al. · ECS Journal of Solid State Science and Technology · 21
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Analytical Compact Model of Nanowire Junctionless Gate-All-Around MOSFET Implemented in Verilog-A for Circuit Simulation
2022 · Billel Smaani, Shiromani Balmukund Rahi, et al. · Silicon · 20
Performance evaluation of gate engineered InAs–Si heterojunction surrounding gate TFET
2021 · M. Sathishkumar, T.S. Arun Samuel, et al. · Superlattices and Microstructures · 18
Identifying critical challenges in the adoption of cloud‐based services
2017 · Shiromani Balmukund Rahi, Sandip Bisui, et al. · International Journal of Communication Systems · 18
Compact analytical model of double gate junction-less field effect transistor comprising quantum-mechanical effect
2015 · Shoubhik Gupta, Bahniman Ghosh, et al. · Journal of Semiconductors · 16
Optimization for Device Figure of Merit of Ferroelectric Tunnel FET using Genetic Algorithm
2023 · Naima Guenifi, Shiromani Balmukund Rahi, et al. · ECS Journal of Solid State Science and Technology · 15
Suppression of Ambipolar Current and Analysis of RF Performance in Double Gate Tunneling Field Effect Transistors for Low-Power Applications
2020 · Guenifi N, Rahi SB, et al. · International Journal of Nanoparticles and Nanotechnology · 13
Optimization of tunneling current in ferroelectric tunnel FET using genetic algorithm
2023 · Naima Guenifi, Shiromani Balmukund Rahi, et al. · The Journal of Supercomputing · 12
Device Simulation Based Machine Learning Technique for III V TFET
2024 · M Saravanan, Eswaran Parthasarathy, et al. · International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI) · 10
Design and analysis of novel La:HfO2 gate stacked ferroelectric tunnel FET for non-volatile memory applications
2024 · Neha Paras, Shiromani Balmukund Rahi, et al. · Memories - Materials Devices Circuits and Systems · 10
Performance Analysis of 8/16/32-bit Calculator Using Verilog and System Verilog
2024 · M. Saravanan, J. Saritha, et al. · International Conference on Ubiquitous Computing and Intelligent Information Systems (ICUIS) · 9
Works count: 91
Citation count: 803
H-index: 18
I10-index: 24
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