Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
Sukarn Agarwal
Institutions:
Indian Institute of Science Education and Research, Bhopal,
Indian Institute of Technology Mandi
Observed institutions:
Indian Institute of Technology Guwahati,
Indian Institute of Science Education and Research, Bhopal,
Indian Institute of Technology BHU,
Banaras Hindu University,
Indian Institute of Technology Mandi,
University of Edinburgh
show all 6
ORCID:
0000-0003-1292-3235
Observed ORCID:
0000-0003-1292-3235
OpenAlex ID:
A5034837887
Improving the Lifetime of Non-Volatile Cache by Write Restriction
2019
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IEEE Transactions on Computers
·
23
Reuse-Distance-Aware Write-Intensity Prediction of Dataless Entries for Energy-Efficient Hybrid Caches
2018
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
·
16
Fault Tolerance in Network on Chip Using Bypass Path Establishing Packets
2018
·
Sharma Priya
, Sukarn Agarwal
, et al.
·
International Conference on VLSI Design
·
14
Restricting writes for energy-efficient hybrid cache in multi-core architectures
2016
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IFIP/IEEE International Conference on Very Large Scale Integration
·
13
Compound Memory Models
2023
·
Andrés Goens
, Soham Chakraborty
, et al.
·
Proceedings of the ACM on Programming Languages
·
12
PDF
Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors
2017
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
International Conference on VLSI Design
·
11
Targeting inter set write variation to improve the lifetime of non-volatile cache using fellow sets
2017
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IFIP/IEEE International Conference on Very Large Scale Integration
·
10
DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore
2022
·
Sangeet Saha
, Shounak Chakraborty
, et al.
·
IEEE Transactions on Parallel and Distributed Systems
·
9
Improving the Performance of Hybrid Caches Using Partitioned Victim Caching
2020
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
ACM Transactions on Embedded Computing Systems
·
7
Reuse Distance-based Victim Cache for Effective Utilisation of Hybrid Main Memory System
2020
·
Arijit Nath
, Sukarn Agarwal
, et al.
·
ACM Transactions on Design Automation of Electronic Systems
·
6
Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)
2023
·
Sukarn Agarwal
, Shounak Chakraborty
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
5
DAMUS: Dynamic Allocation based on Write Frequency in MUlti-Retention STT-RAM based Last Level Caches
2021
·
Mayank Baranwal
, Udbhav Chugh
, et al.
·
International Symposium on Quality Electronic Design (ISQED)
·
5
LiNoVo: Longevity Enhancement of Non-Volatile Last Level Caches in Chip Multiprocessors
2020
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IEEE Computer Society Annual Symposium on VLSI
·
5
ABACa: Access Based Allocation on Set Wise Multi-Retention in STT-RAM Last Level Cache
2021
·
Sukarn Agarwal
, Shounak Chakraborty
·
IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
·
4
ARCTIC: Approximate Real-Time Computing in a Cache-Conscious Multicore Environment
2024
·
Sangeet Saha
, Shounak Chakraborty
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
3
PDF
Towards Optimizing Refresh Energy in embedded-DRAM Caches using Private Blocks
2019
·
Sheel Sindhu Manohar
, Sukarn Agarwal
, et al.
·
ACM Great Lakes Symposium on VLSI (GLSVLSI)
·
3
Lifetime Enhancement of Non-Volatile Caches by Exploiting Dynamic Associativity Management Techniques
2019
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
IFIP advances in information and communication technology
·
3
Towards Analysing the Effect of Hybrid Caches on the Temperature of Tiled Chip Multi-Processors
2018
·
Ashwini Kulkarni
, Khushboo Rani
, et al.
·
IEEE International Symposium on Smart Electronic Systems (iSES)
·
3
Enhancing the Lifetime of Non-Volatile Caches by Exploiting Module-Wise Write Restriction
2019
·
Sukarn Agarwal
, Hemangee K. Kapoor
·
ACM Great Lakes Symposium on VLSI (GLSVLSI)
·
2
Non-blocking Gated Buffers for Energy Efficient on-chip Interconnects in the era of Dark Silicon
2018
·
Khushboo Rani
, Sukarn Agarwal
, et al.
·
International Symposium on Embedded Computing and System Design (ISED)
·
2
PRECIOUS: Approximate Real-Time Computing in MLC-MRAM Based Heterogeneous CMPs
2025
·
Sangeet Saha
, Shounak Chakraborty
, et al.
·
IEEE Transactions on Computers
·
1
PDF
HotReRAM: A Performance-Power–Thermal Simulation Framework for ReRAM-Based Caches
2025
·
Shounak Chakraborty
, Thanasin Bunnam
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
1
PDF
TEEMO: Temperature Aware Energy Efficient Multi-Retention STT-RAM Cache Architecture
2024
·
Sukarn Agarwal
, Shounak Chakraborty
, et al.
·
IEEE International Parallel and Distributed Processing Symposium (IPDPS)
·
1
DidaSel
2020
·
Khushboo Rani
, Sukarn Agarwal
, et al.
·
International Symposium on Low Power Electronics and Design (ISLPED)
·
1
Review of: "Host-Guided Data Placement—Whose Job Is It Anyway?"
2025
·
Sukarn Agarwal
·
Qeios
Show more works
View as search
Works count:
27
Citation count:
160
H-index:
8
I10-index:
7
Year
Topic
Type