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Author

Haerang Choi

ORCID: 0000-0002-8933-6226
Observed ORCID: 0000-0002-8933-6226
OpenAlex ID: A5035766461
A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications
2022 · Seongju Lee, Kyuyoung Kim, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 160
System Architecture and Software Stack for GDDR6-AiM
2022 · Yongkee Kwon, Kornijcuk Vladimir, et al. · IEEE Hot Chips Symposium · 88
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System
2024 · Minseok Seo, Xuan Truong Nguyen, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · 76
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application
2022 · Daehan Kwon, Seongju Lee, et al. · IEEE Journal of Solid-State Circuits · 52
McDRAM v2: In-Dynamic Random Access Memory Systolic Array Accelerator to Address the Large Model Problem in Deep Neural Networks on the Edge
2020 · Seunghwan Cho, Haerang Choi, et al. · IEEE Access · 38
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Memory-Centric Computing with SK Hynix's Domain-Specific Memory
2023 · Yongkee Kwon, Guhyun Kim, et al. · IEEE Hot Chips Symposium · 31
Reducing DRAM refresh power consumption by runtime profiling of retention time and dual-row activation
2019 · Haerang Choi, Dosun Hong, et al. · Microprocessors and Microsystems · 22
PIMphony: Overcoming Bandwidth and Capacity Inefficiency in PIM-Based Long-Context LLM Inference System
2026 · Hyucksung Kwon, Kyungmo Koo, et al. · IEEE International Symposium on High-Performance Computer Architecture (HPCA) · 14
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SK Hynix AI-Specific Computing Memory Solution: From AiM Device to Heterogeneous AiMX-xPU System for Comprehensive LLM Inference
2024 · Guhyun Kim, Jinkwon Kim, et al. · IEEE Hot Chips Symposium · 14
A Novel In-DRAM Accelerator Architecture for Binary Neural Network
2020 · Haerang Choi, Yosep Lee, et al. · IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) · 7
25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector
2014 · Hyun-Woo Lee, Junyoung Song, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7
Darwin: A DRAM-Based Multi-Level Processing-in-Memory Architecture for Column-Oriented Database
2024 · Donghyuk Kim, Jae-Young Kim, et al. · IEEE Transactions on Emerging Topics in Computing · 5
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AiMX: Accelerator-in Memory Based Accelerator for Cost-effective Large Language Model Inference (Invited)
2024 · Haerang Choi, Guhyun Kim, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 3
Works count: 13
Citation count: 517
H-index: 9
I10-index: 9
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