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Yutaka Shionoiri
Observed names:
Y. Shionoiri,
塩野入豊
Institution:
Semiconductor Energy Laboratory (Japan)
Observed institution:
Semiconductor Energy Laboratory (Japan)
OpenAlex ID:
A5035857609
Evaluation of Off-State Current Characteristics of Transistor Using Oxide Semiconductor Material, Indium–Gallium–Zinc Oxide
2012
·
Kiyoshi Kato
, Yutaka Shionoiri
, et al.
·
Japanese Journal of Applied Physics
·
178
PDF
Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor
2012
·
Hiroki Inoue
, Takanori Matsuzaki
, et al.
·
IEEE Journal of Solid-State Circuits
·
103
(Invited) Success in Measurement the Lowest Off-state Current of Transistor in the World
2011
·
Yusuke Sekine
, Kazuma Furutani
, et al.
·
ECS Transactions
·
54
DRAM Using Crystalline Oxide Semiconductor for Access Transistors and Not Requiring Refresh for More Than Ten Days
2012
·
T. Atsumi
, S. Nagatsuka
, et al.
·
IEEE International Memory Workshop (IMW)
·
39
1Mb Non-Volatile Random Access Memory Using Oxide Semiconductor
2011
·
Takanori Matsuzaki
, Hiroki Inoue
, et al.
·
IEEE International Memory Workshop (IMW)
·
30
UHF RFCPUs on Flexible and Glass Substrates for Secure RFID Systems
2008
·
Yoshiyuki Kurokawa
, Takayuki Ikeda
, et al.
·
IEEE Journal of Solid-State Circuits
·
28
A 3bit/cell nonvolatile memory with crystalline In-Ga-Zn-O TFT
2013
·
Shuhei Nagatsuka
, Takanori Matsuzaki
, et al.
·
IEEE International Memory Workshop (IMW)
·
22
21.2: Full‐Functional System Liquid Crystal Display Using CG‐Silicon Technology
2004
·
T. Ikeda
, Y. Shionoiri
, et al.
·
SID Symposium Digest of Technical Papers
·
22
Scaling to 50-nm C-axis aligned crystalline In-Ga-Zn oxide FET with surrounded channel structure and its application for less-than-5-nsec writing speed memory
2014
·
Y. Kobayashi
, D. Matsubayashi
, et al.
·
Symposium on VLSI Technology
·
20
RFCPUs on glass and plastic substrates fabricated by TFT transfer technology
2006
·
H. Dembo
, Y. Kurokawa
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
19
43.1: Low‐power Display System Driven by Utilizing Technique Using Crystalline IGZO Transistor
2012
·
Tatsuji Nishijima
, Seiichi Yoneda
, et al.
·
SID Symposium Digest of Technical Papers
·
17
Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor
2013
·
H. Kobayashi
, K. Kato
, et al.
·
IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
·
16
Eight-bit CPU with Nonvolatile Registers Capable of Holding Data for 40 Days at 85°C Using Crystalline In-Ga-Zn Oxide Thin Film Transistors
2012
·
T. Ohmaru
, S. Yoneda
, et al.
·
International Conference on Solid State Devices and Materials (SSDM)
·
13
30.2: A 4.5‐in. Full‐Color VGA Poly‐Si TFT‐LCD with Integrated Drivers
1998
·
J. Koyama
, S. Nakajima
, et al.
·
SID Symposium Digest of Technical Papers
·
13
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor
2014
·
Atsuo Isobe
, Hikaru Tamura
, et al.
·
Symposium on VLSI Circuits
·
12
42.3: 4‐in. VGA Reflection‐Type Poly‐Si TFT LCD with Integrated Digital Driver Using Seven‐Mask CG Silicon CMOS Process
2000
·
Yoshiharu Hirakata
, Masayuki Sakakura
, et al.
·
SID Symposium Digest of Technical Papers
·
9
16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method
2015
·
Takanori Matsuzaki
, Tatsuya Onuki
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
8
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating
2014
·
Hikaru Tamura
, Kiyoshi Kato
, et al.
·
IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
·
8
SRAM with c-axis aligned crystalline oxide semiconductor: Power leakage reduction technique for microprocessor caches
2014
·
Takahiko Ishizu
, Kiyoshi Kato
, et al.
·
IEEE International Memory Workshop (IMW)
·
6
State retention flip flop architectures with different tradeoffs using crystalline indium gallium zinc oxide transistors implemented in a 32-bit normally-off microprocessor
2014
·
Niclas Sjökvist
, Takuro Ohmaru
, et al.
·
Japanese Journal of Applied Physics
·
6
PDF
A normally-off microcontroller unit with an 85% power overhead reduction based on crystalline indium gallium zinc oxide field effect transistors
2014
·
Kazuaki Ohshima
, Hidetomo Kobayashi
, et al.
·
Japanese Journal of Applied Physics
·
6
PDF
A 16-level-cell memory with c -axis-aligned a – b -plane-anchored crystal In–Ga–Zn oxide FET using threshold voltage cancel write method
2016
·
Takanori Matsuzaki
, Tatsuya Onuki
, et al.
·
Japanese Journal of Applied Physics
·
4
PDF
Multi-Level Cell Memory with High-Speed, Low-Voltage Writing and High Endurance Using Crystalline In-Ga-Zn Oxide Thin Film Transistor
2012
·
T. Ishizu
, H. Inoue
, et al.
·
International Conference on Solid State Devices and Materials (SSDM)
·
4
UHF RFCPUs on Flexible and Glass Substrates for Secure RFID Systems
2007
·
Yoshiyuki Kurokawa
, Takayuki Ikeda
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
4
Zero Area Overhead State Retention Flip Flop Utilizing Crystalline In-Ga-Zn Oxide Thin Film Transistor with Simple Power Control Implemented in a 32-bit CPU
2015
·
N. Sjokvist
, T. Ohmaru
, et al.
·
International Conference on Solid State Devices and Materials (SSDM)
·
3
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Works count:
34
Citation count:
649
H-index:
13
I10-index:
15
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