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Seiya Shibata
Observed names:
Seiya SHIBATA,
Shibata, Seiya
Institution:
NEC (Japan)
Observed institutions:
NEC (Japan),
Japan Society for the Promotion of Science,
Nagoya University
OpenAlex ID:
A5036311896
Advanced SystemBuilder: A tool set for multiprocessor design space exploration
2010
·
Seiya Shibata
, Shinya Honda
, et al.
·
International SoC Design Conference
·
14
Fast design space exploration for mixed hardware-software embedded systems
2011
·
Yuki Ando
, Seiya Shibata
, et al.
·
International SoC Design Conference
·
7
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA
2019
·
Salita Sombatsiri
, Seiya Shibata
, et al.
·
IPSJ Transactions on System and LSI Design Methodology
·
4
PDF
Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration
2013
·
Yuki Ando
, Seiya Shibata
, et al.
·
IFIP advances in information and communication technology
·
3
PDF
A Fast Performance Estimation Framework for System-Level Design Space Exploration
2012
·
Seiya Shibata
, Yuki Ando
, et al.
·
IPSJ Transactions on System and LSI Design Methodology
·
3
PDF
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation
2010
·
Seiya Shibata
, Yuki Ando
, et al.
·
IPSJ Transactions on System and LSI Design Methodology
·
3
PDF
A case study on MPEG4 decoder design with SystemBuilder
2009
·
Seiya Shibata
, Shinya Honda
, et al.
·
International Symposium on VLSI Design, Automation and Test
·
3
Automatic instrumentation of profilers for FPGA-based design space exploration
2009
·
Seiya Shibata
, Yuki Ando
, et al.
·
International Conference on Field-Programmable Technology (FPT)
·
2
PDF
Accelerating an IoT Application by using CPU-FPGA tightly coupled architecture
2016
·
Kobayashi Yuki
, Watanabe Yoshikazu
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
·
1
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design
2010
·
Yuki ANDO
, Seiya SHIBATA
, et al.
·
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
·
1
Accelerating Multi-Modal Radio Frequency Fingerprinting by Efficient Early Fusion
2025
·
Kazutoshi Hirose
, Seiya Shibata
, et al.
·
IEEE Vehicular Technology Conference
Work-in-Progress: Temporal RegionDrop – Frame Difference Sparsity for Efficient Video Inference
2024
·
Youki Sada
, Seiya Shibata
, et al.
·
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)
PREDEA: Predicted-RoI based Resource-Efficient Object Detection with Aggregation
2024
·
Yoshikazu Watanabe
, Seiya Shibata
, et al.
·
IEEE International Conference on Smart Computing
RegionDrop: Fast Human Pose Estimation Using Annotation-Aware Spatial Sparsity
2022
·
Youki Sada
, Seiya Shibata
, et al.
·
Lecture notes in computer science
Real-Time Detection and Tracking Using Hybrid DNNs and Space-Aware Color Feature: From Algorithm to System
2020
·
Liang Feng
, Hiroaki Igarashi
, et al.
·
Lecture notes in computer science
Real-Time Detection and Tracking Using Hybrid DNNs and Space-Aware Color Feature: From Algorithm to System
2020
·
Feng Liang
, Hiroaki Igarashi
, et al.
·
Lecture notes in computer science
Column
2015
·
Yoshihiro KANEKO
, Shunsuke ONO
, et al.
·
IEICE ESS FUNDAMENTALS REVIEW
PDF
Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs
2014
·
Yuki Ando
, Seiya Shibata
, et al.
·
IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs
2013
·
Yuki Ando
, Seiya Shibata
, et al.
·
Field-Programmable Custom Computing Machines
A-20-3 A Fast Intra CU Size Decision Method for Restraining Quantization Error Spreading in HEVC encoding
2013
·
Seiya Shibata
, Kenta Tokumitsu
, et al.
·
Proceedings of the IEICE General Conference
Automated Identification of Performance Bottleneck on Embedded Systems for Architecture Exploration
2012
·
Yuki Ando
, Seiya Shibata
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
Implementation and evaluation of the AES/ADPCM on STP and FPGA with Behavioral Synthesis
2012
·
Yukihito Ishida
, Seiya Shibata
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
Methodology and a Framework for Efficient Design Space Exploration at a System Level
2012
·
Shibata, Seiya
·
Institutional Repositories DataBase (IRDB)
Synthesis of efficient data fetch mechanism from the high level communication description
2011
·
Minato Masato
, Yuki Ando
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
Case Studies on an FPGA with System-Level Multiprocessor Design Toolset
2011
·
Seiya Shibata
, Yuki Ando
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
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Works count:
31
Citation count:
41
H-index:
3
I10-index:
1
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