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Junheng Zhu

ORCID: 0000-0002-0329-1769
Observed ORCID: 0000-0002-0329-1769
OpenAlex ID: A5037002997
S2EFT: Spectral-Spatial-Elevation Fusion Transformer for hyperspectral image and LiDAR classification
2023 · Yining Feng, Junheng Zhu, et al. · Knowledge-Based Systems · 91
MS2CANet: Multiscale Spatial–Spectral Cross-Modal Attention Network for Hyperspectral Image and LiDAR Classification
2024 · Xianghai Wang, Junheng Zhu, et al. · IEEE Geoscience and Remote Sensing Letters · 84
S3F2Net: Spatial-Spectral-Structural Feature Fusion Network for Hyperspectral Image and LiDAR Data Classification
2025 · Xianghai Wang, Liyang Song, et al. · IEEE Transactions on Circuits and Systems for Video Technology · 73
A 32-MHz, 34-μW Temperature-Compensated RC Oscillator Using Pulse Density Modulated Resistors
2021 · Amr Khashaba, Junheng Zhu, et al. · IEEE Journal of Solid-State Circuits · 41
A 0.0021 mm21.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS
2016 · Junheng Zhu, Romesh Kumar Nandwana, et al. · IEEE Journal of Solid-State Circuits · 32
A Novel Semi-Supervised Long-Tailed Learning Framework With Spatial Neighborhood Information for Hyperspectral Image Classification
2023 · Yining Feng, Ruoxi Song, et al. · IEEE Geoscience and Remote Sensing Letters · 24
3.2 A 0.0088mm2 Resistor-Based Temperature Sensor Achieving 92fJ·K2 FoM in 65nm CMOS
2020 · Amr Khashaba, Junheng Zhu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 22
A 6 $\mu$ W ±50 ppm/°C ±1500 ppm/V 1.5 MHz $RC$ Oscillator Using Self-Regulation
2018 · Tianyu Wang, Danielle Griffith, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 20
A 3.2-GHz 405 fsrms Jitter –237.2 dB FoMJIT Ring-Based Fractional-N Synthesizer
2022 · Ahmed Elmallah, Junheng Zhu, et al. · IEEE Journal of Solid-State Circuits · 19
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3.5 A 34µW 32MHz RC Oscillator with ±530ppm Inaccuracy from −40°C to 85°C and 80ppm/V Supply Sensitivity Enabled by Pulse-Density Modulated Resistors
2020 · Amr Khashaba, Junheng Zhu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 19
19.8 A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS
2016 · Junheng Zhu, Romesh Kumar Nandwana, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 15
29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS
2017 · Romesh Kumar Nandwana, Saurabh Saxena, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 10
A 0.016 mm2 0.26-$\mu$ W/MHz 60–240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS
2019 · Junheng Zhu, Woo-Seok Choi, et al. · IEEE Journal of Solid-State Circuits · 5
A 3.2GHz 405fsrms jitter -237.2dB-FoMJIT ring-based fractional-N synthesizer using two-step quantization noise cancellation and piecewise-linear nonlinearity correction
2021 · Ahmed Elmallah, Junheng Zhu, et al. · Custom Integrated Circuits Conference · 4
SaDHT: A Scale-aware Deep Hierarchical Transformer for hyperspectral-LiDAR data fusion classification
2026 · Junheng Zhu, Yining Feng, et al. · Knowledge-Based Systems · 3
LKA-GFNet: Language Knowledge-Augmented Graph Fusion for Tri-Source Heterogeneous Remote Sensing Data Classification
2026 · Wei Cheng, Ruyi Li, et al. · IEEE Transactions on Geoscience and Remote Sensing · 3
A 45–75MHz 197–452µW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS
2017 · Junheng Zhu, Makrand Mahalley, et al. · Custom Integrated Circuits Conference · 1
65nm CMOSにおける時間に基づく積分制御を用いた0.0021mm~21.82mW,2.2GHz PLL【Powered by NICT】
2017 · Junheng Zhu, Nandwana Romesh Kumar, et al. · IEEE Journal of Solid-State Circuits · 1
IFE-FSL: Interactive frequency enhancement network for cross-domain few-shot HSI-LiDAR classification
2026 · Junheng Zhu, Tingting Geng, et al. · Pattern Recognition
Low-area and power-efficient on-chip clock reference generation
2019 · Junheng Zhu · Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign)
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65nm CMOSにおける柔軟なクロックを持つ29.6Aの10Gb/S5.75pJトランシーバ【Powered by NICT】
2017 · Nandwana Romesh Kumar, Saurabh Saxena, et al. · IEEE Conference Proceedings
29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS
2017 · Nandwana Romesh Kumar, Saurabh Saxena, et al. · IEEE Conference Proceedings
Phase-locked loop using time-based integral control
2016 · Junheng Zhu · Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign)
Ring Oscillator Integrator Based Analog Filter: System Level Design and Modeling Using Verilog-ams
2014 · Junheng Zhu · Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign)
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Works count: 24
Citation count: 467
H-index: 11
I10-index: 12
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