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Author

Kyungsu Kang

Observed name: Kyung-Su Kang
Institution: Sahmyook University
Observed institutions: Korea Advanced Institute of Science and Technology, Changwon National University, Samsung (South Korea), Sahmyook University, Samsung Electronics (South Korea), École Polytechnique Fédérale de Lausanne
ORCID: 0000-0002-6955-578X
Observed ORCID: 0000-0002-6955-578X
OpenAlex ID: A5037212268
Predicting types of occupational accidents at construction sites in Korea using random forest model
2019 · Kyungsu Kang, Hanguk Ryu · Safety Science · 248
Deep learning-based framework for monitoring wearing personal protective equipment on construction sites
2023 · Yeo-Reum Lee, Seung-Hwan Jung, et al. · Journal of Computational Design and Engineering · 52
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Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints
2011 · Kyungsu Kang, Jungsoo Kim, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 31
Accelerating RocksDB for small-zone ZNS SSDs by parallel I/O mechanism
2022 · Minwoo Im, Kyungsu Kang, et al. · International Middleware Conference · 27
Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution
2010 · Kyungsu Kang, Jungsoo Kim, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 24
Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache
2014 · Seunghan Lee, Kyungsu Kang, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 19
REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections
2015 · Jinho Lee, Kyungsu Kang, et al. · ACM Journal on Emerging Technologies in Computing Systems · 14
Design and management of 3D-stacked NUCA cache for chip multiprocessors
2011 · Jongpil Jung, Kyungsu Kang, et al. · ACM Great Lakes Symposium on VLSI (GLSVLSI) · 14
Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation
2011 · Woojin Yun, Kyungsu Kang, et al. · IEEE International Symposium on Circuits and Systems proceedings · 12
A high-throughput and low-latency interconnection network for multi-core Clusters with 3-D stacked L2 tightly-coupled data memory
2012 · Kyungsu Kang, Luca Benini, et al. · IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC) · 11
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Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache
2014 · Kyungsu Kang, Giovanni De Micheli, et al. · International Symposium on Quality Electronic Design (ISQED) · 10
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Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study
2019 · Kyungsu Kang, Sangho Park, et al. · Design, Automation, and Test in Europe · 8
THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures
2015 · Jinho Lee, Junwhan Ahn, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 8
Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory
2011 · Kyungsu Kang, Jongpil Jung, et al. · International Symposium on Quality Electronic Design (ISQED) · 8
Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS
2012 · Woojin Yun, Jongpil Jung, et al. · International SoC Design Conference · 7
Search Area Selective Reuse Algorithm in Motion Estimation
2007 · Heejun Shim, Kyungsu Kang, et al. · IEEE International Conference on Multimedia and Expo (ICME) · 6
Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory
2014 · Kyungsu Kang, Luca Benini, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 5
Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime
2016 · Seunghan Lee, Kyungsu Kang, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 4
Early HW/SW Co-Verification Using Virtual Platforms
2021 · Jungyun Choi, Kyungsu Kang, et al. · International SoC Design Conference · 3
A Power-Efficient 3-D On-Chip Interconnect for Multi-Core Accelerators with Stacked L2 Cache
2016 · Kyungsu Kang, Sangho Park, et al. · Design, Automation, and Test in Europe · 3
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Runtime 3-D stacked cache data management for energy minimization of 3-D chip-multiprocessors
2014 · Seunghan Lee, Kyungsu Kang, et al. · International Symposium on Quality Electronic Design (ISQED) · 3
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
2007 · Jungsoo Kim, Kyungsu Kang, et al. · IFIP International Conference on Very Large Scale Integration (VLSI-SoC) · 3
Cost-effective TSV redundancy configuration
2012 · Jongpil Jung, Kyungsu Kang, et al. · IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC) · 2
Squeezing maximizing performance out of 3D cache-stacked multicore architectures
2011 · Asim Khan, Kyungsu Kang, et al. · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 2
Energy minimization of 3D cache-stacked processor based on thin-film thermoelectric coolers
2011 · Soojung Rho, Kyungsu Kang, et al. · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 2
Works count: 37
Citation count: 535
H-index: 10
I10-index: 11
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