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Zeeshan Sarwer

Observed name: Sarwer, Zeeshan
ORCID: 0000-0001-8606-3798
Observed ORCID: 0000-0001-8606-3798
OpenAlex ID: A5037973585
A transformerless high gain dc–dc boost converter with reduced voltage stress
2021 · Mohammad Zaid, Shahrukh Khan, et al. · International Transactions on Electrical Energy Systems · 69
An improved asymmetrical multilevel inverter topology with reduced semiconductor device count
2020 · Zeeshan Sarwer, Marif Daula Siddique, et al. · International Transactions on Electrical Energy Systems · 53
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A New Transformerless Quadratic Boost Converter with High Voltage Gain
2020 · Javed Ahmad, Mohammad Zaid, et al. · Smart Science · 45
A non‐isolated quasi‐Z‐source‐based high‐gain DC–DC converter
2021 · Arshad Mahmood, Mohammad Zaid, et al. · International Journal of Circuit Theory and Applications · 42
Asymmetrical multilevel inverter topology with low total standing voltage and reduced switches count
2021 · M. Saad Bin Arif, Zeeshan Sarwer, et al. · International Journal of Circuit Theory and Applications · 38
A Transformerless Quadratic Boost High Gain DC-DC Converter
2020 · Mohammad Zaid, Javed Ahmad, et al. · IEEE International Conference on Power Electronics, Drives and Energy Systems · 23
A nine‐level common ground multilevel inverter (9L‐CGMLI) with reduced components and boosting ability
2023 · Zeeshan Sarwer, Md Nishat Anwar, et al. · International Journal of Circuit Theory and Applications · 21
Switched capacitor based 7-level and 9-level multilevel inverters with single DC source and reduced voltage stress
2023 · Zeeshan Sarwer, Marif Daula Siddique, et al. · e-Prime - Advances in Electrical Engineering Electronics and Energy · 17
Implementation of a Novel Variable Structure Nearest Level Modulation on Cascaded H-Bridge Multilevel Inverter
2021 · Zeeshan Sarwer, Adil Sarwar, et al. · IEEE Access · 15
A switched‐capacitor multilevel inverter topology employing a novel variable structure nearest‐level modulation
2021 · Zeeshan Sarwer, Marif Daula Siddique, et al. · International Transactions on Electrical Energy Systems · 13
Symmetrical and Asymmetrical Multilevel Inverter Topologies With Reduced Device Count: A Review
2021 · Noorul Islam, Khan Mohammad, et al. · International Conference for Emerging Technology (INCET) · 12
Design and investigation of a triple boost multilevel inverter with self‐balanced switched capacitors and reduced voltage stress
2022 · Zeeshan Sarwer, Md Nishat Anwar, et al. · International Journal of Circuit Theory and Applications · 11
Design and Validation of a Reduced Switching Components Step-Up Multilevel Inverter (RSCS-MLI)
2021 · Mohammad Wasiq, Adil Sarwar, et al. · Processes · 6
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A single‐source nine‐level solar‐PV inverter with quadruple voltage boosting and high reliability
2024 · Mohammad Zaid, Mohammad Tayyab, et al. · International Journal of Circuit Theory and Applications · 5
Self-Balanced Switched Capacitor Based 7-Level Multilevel Inverter with Triple Voltage Gain and Reduced Switching Components
2022 · Zeeshan Sarwer, Md Nishat Anwar, et al. · IEEE Global Conference on Computing, Power and Communication Technologies (GlobConPT) · 5
Seven-Level Switched-Capacitor Based Multilevel Inverter With Lesser Number of Power Electronic Components and Reduced Voltage Stress
2020 · Zeeshan Sarwer, Marif Daula Siddique, et al. · IEEE International Conference on Power Electronics, Drives and Energy Systems · 5
Realization of an asymmetric Switched-Capacitor Multilevel Inverter using Nearest Level Control
2019 · Anzar Ahmad, Mu Anas, et al. · International Conference on Power Energy, Environment and Intelligent Control (PEEIC) · 5
Comparative Performance Study of Five-Phase Induction Motor
2019 · Zeeshan Sarwer, Mohd Sartaj, et al. · Innovations in Power and Advanced Computing Technologies (i-PACT) · 5
Speed Control of PMBLDC Motor Using Fuzzy Logic Controller in Sensorless Mode with Back-EMF Detection
2018 · Mohammad Zaid, Zeeshan Sarwer, et al. · Advances in intelligent systems and computing · 5
A General Review of the Recently Proposed Asymmetrical Multilevel Inverter Topologies
2021 · Bilal Alam, Maaz Nusrat, et al. · Lecture notes in electrical engineering · 4
Modified asymmetrical 13-level inverter topology with reduce power semiconductor devices
2020 · M Saad Arif, Zeeshan Sarwer, et al. · International Journal of Power Electronics and Drive Systems/International Journal of Electrical and Computer Engineering · 4
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Operation, analysis, and implementation of a reduced device count asymmetrical multilevel inverter
2021 · Zeeshan Sarwer, Ankush Kumar Sharma, et al. · International Journal of Circuit Theory and Applications · 3
A Single Input Dual Output High Gain DC-DC Converter With Reduced Voltage Stress
2021 · Shahrukh Khan, Kush Varshney, et al. · Annual Conference of the IEEE Industrial Electronics Society (IECON) · 3
A Switched Capacitor Multilevel Inverter with Self Voltage Balancing Capability
2020 · Zeeshan Sarwer, Adil Sarwar, et al. · IEEE International Conference on Power Electronics, Drives and Energy Systems · 3
Optimal Allocation of Distributed Energy Resources in a Distribution System
2019 · Mohammad Zaid, Afroz Alam, et al. · Innovations in Power and Advanced Computing Technologies (i-PACT) · 3
Works count: 34
Citation count: 422
H-index: 11
I10-index: 12
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