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Author

Chaithanya Mannepalli

Institution: GITAM University
Observed institution: GITAM University
ORCID: 0000-0002-2686-1189
Observed ORCID: 0000-0002-2686-1189
OpenAlex ID: A5042849411
FinFET Modelling Using TCAD
2017 · Sreenivasa Rao Ijjada, Chaithanya Mannepalli, et al. · Lecture notes in electrical engineering · 7
Modified Low-Power Hybrid 1-Bit Full Adder
2017 · Chaithanya Mannepalli, Chaitanya Kommu · Lecture notes in electrical engineering · 4
Retraction Note: A 9-bit pseudo-noise-based calibrated successive approximation ADC with differential/integral nonlinearity enhancement
2024 · Chakradhar Adupa, Chaithanya Mannepalli, et al. · Soft Computing
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RETRACTED ARTICLE: A 9-bit pseudo-noise-based calibrated successive approximation ADC with differential/integral nonlinearity enhancement
2022 · Chakradhar Adupa, Chaithanya Mannepalli, et al. · Soft Computing
Design of 14 bit current steering d/a converter with self-checking circuit for high speed iot applications
2022 · Chakradhar Adupa, Chaithanya Mannepalli, et al. · AIP conference proceedings
Design and analysis of high performance 9 bit SAR ADC with SFDR 76.59
2022 · Chakradhar Adupa, Chaithanya Mannepalli, et al. · AIP conference proceedings
Works count: 6
Citation count: 11
H-index: 2
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