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Lukas Leuenberger
Observed name:
Leuenberger, Lukas
Institutions:
University of Applied Sciences Rapperswil,
OST - Ostschweizer Fachhochschule
Observed institutions:
University of Applied Sciences Rapperswil,
OST - Ostschweizer Fachhochschule
ORCID:
0000-0001-5961-2261
Observed ORCID:
0000-0001-5961-2261
OpenAlex ID:
A5043540991
FPGA-based SPHINCS + Implementations: Mind the Glitch
2020
·
Dorian Amiet
, Lukas Leuenberger
, et al.
·
Euromicro Conference on Digital System Design (DSD)
·
66
Defeating NewHope with a Single Trace
2020
·
Dorian Amiet
, Andreas Curiger
, et al.
·
Lecture notes in computer science
·
49
An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
2021
·
Lukas Leuenberger
, Dorian Amiet
, et al.
·
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
·
19
Sneaky Glitch: A Clock Glitch Generator to attack the AMD-Xilinx PLL
2024
·
Lukas Leuenberger
, Roman Willi
, et al.
·
Research Square
·
1
PDF
Glitch Happens: Attacking the AMD-Xilinx PLL with a Clock Glitch Generator
2025
·
Lukas Leuenberger
, Roman Willi
, et al.
·
Euromicro Conference on Digital System Design (DSD)
Ultraschneller FPGA-basierter AD-Wandler
2025
·
Leuenberger, Lukas
·
E-Periodica
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Works count:
10
Citation count:
135
H-index:
3
I10-index:
3
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