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Keiji Ikeda

High mobility Ge-on-insulator p-channel MOSFETs using Pt germanide Schottky source/drain
2005 · T. Maeda, K. Ikeda, et al. · IEEE Electron Device Letters · 126
Gate dielectric formation and MIS interface characterization on Ge
2007 · S. Takagi, T. Maeda, et al. · Microelectronic Engineering · 102
Modulation of NiGe∕Ge Schottky barrier height by sulfur segregation during Ni germanidation
2006 · Keiji Ikeda, Yoshimi Yamashita, et al. · Applied Physics Letters · 91
Non-Recessed-Gate Enhancement-Mode AlGaN/GaN High Electron Mobility Transistors with High RF Performance
2004 · Akira Endoh, Yoshimi Yamashita, et al. · Japanese Journal of Applied Physics · 79
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Surrounding Gate Vertical-Channel FET With a Gate Length of 40 nm Using BEOL-Compatible High-Thermal-Tolerance In-Al-Zn Oxide Channel
2020 · Hirokazu Fujiwara, Yuta Sato, et al. · IEEE Transactions on Electron Devices · 75
Thin-body Ge-on-insulator p-channel MOSFETs with Pt germanide metal source/drain
2005 · Tatsuro Maeda, Keiji Ikeda, et al. · Thin Solid Films · 66
High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/Drain
2007 · Toyoji Yamamoto, Yoshimi Yamashita, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 62
Demonstration of ultimate CMOS based on 3D stacked InGaAs-OI/SGOI wire channel MOSFETs with independent back gate
2014 · T. Irisawa, K. Ikeda, et al. · Symposium on VLSI Technology · 38
50-nm gate Schottky source/drain p-MOSFETs with a SiGe channel
2002 · K. Ikeda, Y. Yamashita, et al. · IEEE Electron Device Letters · 38
Fabrication of sub‐50‐nm‐gate i‐AlGaN/GaN HEMTs on sapphire
2003 · Akira Endoh, Yoshimi Yamashita, et al. · Physica status solidi. C, Conferences and critical reviews/Physica status solidi. C, Current topics in solid state physics · 37
Characterization of platinum germanide/Ge(100) Schottky barrier height for Ge channel Metal Source/Drain MOSFET
2005 · Keiji Ikeda, Tatsuro Maeda, et al. · Thin Solid Films · 36
Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) with 4F2 Architecture
2024 · Shosuke Fujii, Tseng Fu Lu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 35
Atomic layer etching of germanium
1997 · Keiji Ikeda, Shigeru Imai, et al. · Applied Surface Science · 34
Hole mobility enhancement of p-MOSFETs using global and local Ge-channel technologies
2006 · Shinichi Takagi, T. Tezuka, et al. · Materials Science and Engineering B · 27
Gas-phase-reaction-controlled atomic-layer-epitaxy of silicon
1998 · Eiji Hasunuma, Satoshi Sugahara, et al. · Journal of Vacuum Science & Technology A Vacuum Surfaces and Films · 27
High-Mobility and H2-Anneal Tolerant InGaSiO/InGaZnO/InGaSiO Double Hetero Channel Thin Film Transistor for Si-LSI Compatible Process
2018 · Nobuyoshi Saito, Kentaro Miura, et al. · IEEE Journal of the Electron Devices Society · 25
High-mobility and low-parasitic resistance characteristics in strained Ge nanowire pMOSFETs with metal source/drain structure formed by doping-free processes
2012 · Keiji Ikeda, Mizuki Ono, et al. · Symposium on VLSI Technology · 22
High-Performance and Low-Power Bulk Logic Platform Utilizing FET Specific Multiple-Stressors with Highly Enhanced Strain and Full-Porous Low-k Interconnects for 45-nm CMOS Technology
2007 · T. Miyashita, K. Ikeda, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 22
Surrounding Gate Vertical-Channel FET with Gate Length of 40 nm using BEOL Compatible High-Thermal-Tolerance In-Al-Zn Oxide Channel
2020 · Hirokazu Fujiwara, Yuta Sato, et al. · Symposium on VLSI Technology · 21
High-k/Ge p- & n-MISFETs with strontium germanide interlayer for EOT scalable CMIS application
2010 · Yoshiki Kamata, Keiji Ikeda, et al. · Symposium on VLSI Technology · 20
Ultrathin-body Ge-on-insulator wafers fabricated with strongly bonded thin Al2O3/SiO2hybrid buried oxide layers
2014 · Yoshihiko Moriyama, Keiji Ikeda, et al. · Applied Physics Express · 18
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Demonstration of InGaAs/Ge dual channel CMOS inverters with high electron and hole mobility using staked 3D integration
2013 · Toshifumi Irisawa, M. Oda, et al. · Symposium on VLSI Technology · 18
Effects of ambient conditions in thermal treatment for Ge(0 0 1) surfaces on Ge–MIS interface properties
2006 · Noriyuki Taoka, Keiji Ikeda, et al. · Semiconductor Science and Technology · 18
Design Principle of Channel Material for Oxide-Semiconductor Field-Effect Transistor with High Thermal Stability and High On-current by Fluorine Doping
2020 · H. Kawai, H. Fujiwara, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 17
High mobility (>30 cm 2 V −1 s −1 ) and low source/drain parasitic resistance In–Zn–O BEOL transistor with ultralow <10−20 A μ m −1 off-state leakage current
2019 · Nobuyoshi Saito, Tomoaki Sawabe, et al. · Japanese Journal of Applied Physics · 16
Works count: 134
Citation count: 1,422
H-index: 20
I10-index: 37
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