Author

Sherif Abdalla

Observed names: ABDALLA, SHERIF, S. Abdalla

Observed institution: Broadcom (United States)

OpenAlex ID: A5045597701

A Fully Integrated 4$\times$ 10-Gb/s DWDM Optoelectronic Transceiver Implemented in a Standard 0.13 $\mu{\hbox {m}}$ CMOS SOI Technology

2007 · Adithyaram Narasimha, Behnam Analui, et al. · IEEE Journal of Solid-State Circuits · 166

Monolithically integrated high-speed CMOS photonic transceivers

2008 · T. Pinguet, B. Analui, et al. · IEEE International Conference on Group IV Photonics (GFP) · 77

An Ultra Low Power CMOS Photonics Technology Platform for H/S Optoelectronic Transceivers at less than $1 per Gbps

2010 · Adithyaram Narasimha, Sherif Abdalla, et al. · Optical Fiber Communication Conference · 54

A 40-Gb/s QSFP Optoelectronic Transceiver in a 0.13μm CMOS Silicon-on-Insulator Technology

2008 · Adithyaram Narasimha, Behnam Analui, et al. · Optical Fiber Communication Conference · 49

A CMOS photonics platform for high-speed optical interconnects

2012 · A. Mekis, S. Abdalla, et al. · IEEE Photonics Conference · 38

Si Photonics Based High-Speed Optical Transceivers

2012 · Peter De Dobbelaere, Sherif Abdalla, et al. · European Conference on Optical Communication · 33

Scaling CMOS photonics transceivers beyond 100 Gb/s

2012 · Attila Mekis, Sherif Abdalla, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 28

10Gb/s 15mW optical receiver with integrated Germanium photodetector and hybrid inductor peaking in 0.13µm SOI CMOS technology

2010 · Daniel Kucharski, Drew Guckenberger, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 26

Demonstration of first WDM CMOS photonics transceiver with monolithically integrated photo-detectors

2008 · P. De Dobbelaere, B. Analui, et al. · European Conference on Optical Communication · 22

Advantages of CMOS photonics for future transceiver applications

2010 · Drew Guckenberger, Sherif Abdalla, et al. · European Conference on Optical Communication · 20

Monolithic integration of photonic and electronic circuits in a CMOS process

2008 · Attila Mekis, Sherif Abdalla, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 17

A 0.5–9.5-GHz, 1.2- $\mu \text{s}$ Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling

2016 · Fazil Ahmad, Greg Unruh, et al. · IEEE Journal of Solid-State Circuits · 15

CMOS photonics for optical engines and interconnects

2012 · G. Masini, A. Narasimha, et al. · Optical Fiber Communication Conference · 15

Silicon photonics for high data rate optical interconnect

2012 · P. De Dobbelaere, A. Narasimha, et al. · IEEE Optical Interconnects Conference · 12

Silicon Photonic Integrated Circuits

2012 · S. Sahni, A. Narasimha, et al. · Conference on Lasers and Electro-Optics · 12

19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC

2016 · Fazil Ahmad, Greg Unruh, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 3

CMOS Photonics Technology Platform for High-Speed Optical Transceivers

2011 · P. De Dobbelaere, Sherif Abdalla, et al. · Advanced Photonics

Works count: 18

Citation count: 587

H-index: 13

I10-index: 15