Author

Kunjan D. Shinde

Observed name: Kunjan D Shinde

Observed institutions: KLE Technological University, Shri Dharmasthala Manjunatheshwara University

ORCID: 0000-0002-0064-2981

Observed ORCID: 0000-0002-0064-2981

OpenAlex ID: A5045634498

Eight-element flexible MIMO antenna based on characteristics mode theory with enhanced channel capacity for sub 6 GHz 5G communications

2025 · Deepthi Mariam John, Shweta Vincent, et al. · Results in Engineering · 17

Design of fast and efficient 1-bit full adder and its performance analysis

2014 · Kunjan D. Shinde, Jayashree C. Nidagundi · International Conference on Control, Instrumentation, Communication and Computational Technologies · 13

Design, Implementation and Comparative Analysis of Kogge Stone Adder Using CMOS and GDI Design: A VLSI Based Approach

2016 · C. N. Shilpa, Kunjan D. Shinde, et al. · International Conference on Computational Intelligence and Communication Networks (CICN) · 12

Design and implementation of 1 GHz Current Starved Voltage Controlled Oscillator (VCO) for PLL using 90nm CMOS technology

2015 · Vishwanath Muddi, Kunjan D. Shinde, et al. · International Conference on Control, Instrumentation, Communication and Computational Technologies · 10

Performance Analysis and Implementation of Array Multiplier using various Full Adder Designs for DSP Applications: A VLSI Based Approach

2016 · K. A. Asha, Kunjan D. Shinde · Advances in intelligent systems and computing · 8

Analysis and comparative study of 8-bit adder for embedded application

2015 · Kunjan D. Shinde, Sadashiv Badiger · International Conference on Control, Instrumentation, Communication and Computational Technologies · 6

A Novel Approach to Design Braun Array Multiplier Using Parallel Prefix Adders for Parallel Processing Architectures

2018 · Kunjan D. Shinde, K. Amit Kumar, et al. · Communications in computer and information science · 5

Impact of VLSI Design Techniques on Implementation of Parallel Prefix Adders

2018 · Kunjan D. Shinde, K. Amit Kumar, et al. · Communications in computer and information science · 4

Implementation of Low Cost, Reliable, and Advanced Control with Head Movement, Wheelchair for Physically Challenged People

2017 · Kunjan D. Shinde, Sayera Tarannum, et al. · Advances in intelligent systems and computing · 4

Modeling of adders using CMOS and GDI logic for multiplier applications: A VLSI based approach

2016 · D. S. Rashmi, R. Sadiya Rukhsar, et al. · International Conference on Circuit, Power and Computing Technologies · 4

Design and implementation of parallel floating point matrix multiplier for quaternion computation

2015 · Shivaprasad B K, Kunjan D. Shinde, et al. · International Conference on Control, Instrumentation, Communication and Computational Technologies · 4

Bottlenecks in Finite Impulse Response Filter Architectures on a Reconfigurable Platform

2021 · Kunjan D. Shinde, C. Vijaya · Advances in intelligent systems and computing · 2

Investigating Baugh-Wooley multiplier for high-speed digital signal processing applications: A full adder design optimisation approach

2025 · Kunjan D. Shinde, Vinaya S. Isarannavar, et al. · CRC Press eBooks

Investigating the design of a 32-bit Vedic multiplier using high-speed adders on FPGA

2025 · Kunjan D. Shinde, Vinayak Dalavi, et al. · CRC Press eBooks

Denoising of ECG Signal Using Optimized IIR Filter Architecture—A CSD-Based Design

2023 · Kunjan D. Shinde, Darshan Khanapure, et al. · Lecture notes in electrical engineering

Development of Flexible Verification Environment for AMBA APB

2021 · Nithin H. V., Kunjan D. Shinde · JNNCE Journal of Engineering and Management

PDF

Comparative Analysis of 8-bit Adders for Embedded Application