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Prema Kumar Govindaswamy

ORCID: 0009-0005-1225-4846
Observed ORCID: 0009-0005-1225-4846
OpenAlex ID: A5047704529
Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects
2022 · Prema Kumar Govindaswamy, Nijwm Wary, et al. · IEEE International Symposium on Circuits and Systems proceedings · 6
A 0.0375-pJ/bit Charge-Steering Based Hybrid for 8-Gb/s/pin Full-Duplex Chip-to-Chip Interconnects in 65-nm CMOS
2024 · Prema Kumar Govindaswamy, Nijwm Wary, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 4
A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS
2024 · Perakalapudi Ravibabu, Prema Kumar Govindaswamy, et al. · IEEE International Symposium on Circuits and Systems proceedings · 2
A power‐efficient current‐integrating hybrid for full‐duplex communication over chip‐to‐chip interconnects
2022 · Prema Kumar Govindaswamy, Vijaya Sankara Rao Pasupureddi · International Journal of Circuit Theory and Applications · 2
A 2$$^7$$-1, 20-Gb/s, Low-Power, Charge-Steering Half-Rate PRBS Generator in 1.2 V, 65 nm CMOS
2021 · Prema Kumar Govindaswamy, Vijaya Sankara Rao Pasupureddi · Circuits Systems and Signal Processing · 2
Residue monitor enabled charge-mode adaptive echo-cancellation for simultaneous bidirectional signaling over on-chip interconnects
2020 · Pankaj Venuturupalli, Prema Kumar Govindaswamy, et al. · Microelectronics Journal · 2
A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOS
2024 · Prema Kumar Govindaswamy, Mursina Khatun, et al. · IEEE International Symposium on Circuits and Systems proceedings · 1
High-Swing, Power-efficient, Current-Mode Hybrid Circuit Topologies for Simultaneous Bidirectional Communication
2023 · Prema Kumar Govindaswamy, P. Vijay Shankar · IEEE Interregional NEWCAS Conference (NEWCAS) · 1
A Low-Power Half-Rate Charge-Steering Hybrid for Full-Duplex Chip-to-Chip Interconnects
2022 · Prema Kumar Govindaswamy, Nijwm Wary, et al. · IEEE International Symposium on Circuits and Systems proceedings · 1
A 2^7 -1 Low-Power Half-Rate 16-Gb/s Charge-Mode PRBS Generator in 1.2V, 65nm CMOS
2020 · Prema Kumar Govindaswamy, Vijaya Sankara Rao Pasupureddi · IEEE Computer Society Annual Symposium on VLSI · 1
A 0.075-pJ/bit, 8-Gb/s, Power-Efficient Echo-Cancellation-Based Hybrid Circuit Topology for Full-Duplex Transceiver
2026 · Prema Kumar Govindaswamy, Raviteja Kammari, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 27-1, 20-Gb/s, 0.1-pJ/b Pseudo Random Bit Sequence Generator Using Incomplete Settling in 1.2V, 65 nm CMOS
2024 · Prema Kumar Govindaswamy, Mursina Khatun, et al. · IEEE International Symposium on Circuits and Systems proceedings
A 0.186 pJ/bit, 6-Gb/s, Energy-Efficient, Half-Rate Hybrid Circuit Topology in 1.2V, 65 nm CMOS
2024 · Prema Kumar Govindaswamy, Mursina Khatun, et al. · International Symposium on Quality Electronic Design (ISQED)
An adaptive link training based hybrid circuit topology for full‐duplex on‐chip interconnects
2023 · Prema Kumar Govindaswamy, Raviteja Kammari, et al. · International Journal of Circuit Theory and Applications
An Adaptive Hybrid with Residue Monitor for Full-Duplex On-Chip Interconnects
2020 · Pankaj Venuturupalli, Prema Kumar Govindaswamy, et al. · IEEE International Symposium on Circuits and Systems proceedings
Works count: 15
Citation count: 22
H-index: 2
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