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Johannes Kneip

Observed name: J. Kneip
OpenAlex ID: A5049023356
Instruction Set Extensions for MPEG-4 Video
1999 · Mladen Berekovic, Hans-Joachim Stolberg, et al. · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 59
The MPEG-4 video coding standard-a VLSI point of view
2002 · J. Kneip, S. Bauer, et al. · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems · 49
Applying and implementing the MPEG-4 multimedia standard
1999 · J. Kneip, B. Schmale, et al. · IEEE Micro · 31
The MPEG-4 Multimedia Coding Standard: Algorithms, Architectures and Applications
1999 · S. Bauer, J. Kneip, et al. · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 29
Single Chip Programmable Baseband ASSP for 5 GHz Wireless LAN Applications
2002 · J. Kneip, Matthias Weiss, et al. · IEICE Transactions on Electronics · 22
The M-PIRE MPEG-4 codec DSP and its macroblock engine
2002 · H.-J. Stolberg, M. Berekovic, et al. · IEEE International Symposium on Circuits and Systems proceedings · 20
Architecture and applications of the HiPAR video signal processor
1996 · K. Ronner, J. Kneip · IEEE Transactions on Circuits and Systems for Video Technology · 20
MATLAB based codesign framework for wireless broadband communication DSPs
2002 · V. Aue, J. Kneip, et al. · IEEE International Conference on Acoustics Speech and Signal Processing · 17
A data path array with shared memory as core of a high performance DSP
2002 · J. Kneip, K. Ronner, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 15
HiPAR-DSP: a parallel VLIW RISC processor for real time image processing applications
2002 · J.P. Wittenburg, M. Ohmacht, et al. · International Conference on Algorithms and Architectures for Parallel Processing · 9
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
1998 · Mladen Berekovic, Peter Pirsch, et al. · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 9
Architecture and C++-programming environment of a highly parallel image signal processor
1995 · J. Kneip, M. Ohmacht, et al. · Microprocessing and Microprogramming · 8
An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor
1997 · Johannes Kneip, Mladen Berekovic, et al. · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 5
Single-chip highly parallel architecture for image processing applications
1994 · Johannes Kneip, Karsten Roenner, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 5
Parallelization resources of image processing algorithms and their mapping on a programmable parallel videosignal processor
2002 · P. Pirsch, J. Kneip, et al. · IEEE International Symposium on Circuits and Systems proceedings · 4
An algorithm adapted autonomous controlling concept for a parallel single-chip digital signal processor
2002 · J. Kneip, J.P. Wittenburg, et al. · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems · 3
A design methodology for high performance ICs: wireless broadband radio baseband case study
2002 · V. Aue, J. Kneip, et al. · Euromicro Conference on Digital System Design (DSD) · 3
An algorithm-hardware-system approach to VLIW multimedia processors
2002 · J. Kneip, M. Berekovic, et al. · IEEE International Workshop on Multimedia Signal Processing (MMSP) · 2
A Highly Parallel Single Chip Video signal Processor
1995 · K. Rönner, J. Kneip, et al. · Elsevier eBooks · 2
An object based data cache with conflict free concurrent access as shared memory for a parallel DSP
2002 · J. Kneip, P. Pirsch · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems · 1
Memory efficient list based Hough transform for programmable digital signal processors with on-chip caches
2002 · J. Kneip, P. Pirsch · IEEE Digital Signal Processing Workshop and IEEE Signal Processing Education Workshop (DSP/SPE) · 1
A 1.3 GOPS parallel DSP for high performance image processing applications
1999 · W. Hinrichs, Jens Wittenburg, et al. · European Solid-State Circuits Conference (ESSCIRC) · 1
An object-oriented data cache architecture for programmable parallel digital signal processors
2002 · J. Kneip · International Conference on Algorithms and Architectures for Parallel Processing
Foreword
1999 · Johannes Kneip, Bernd Schmale · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology
Parallel implementation of medium level algorithms on a monolithic ASIMD multiprocessor
1996 · J. Kneip, M. Ohmacht, et al. · IEEE International Symposium on Circuits and Systems proceedings
Works count: 27
Citation count: 315
H-index: 9
I10-index: 9
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