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Shosuke Fujii

Observed names: S. Fujii, Shosuke FUJII, 章輔 藤井, 藤井章輔
ORCID: 0000-0003-1112-2081
Observed ORCID: 0000-0003-1112-2081
OpenAlex ID: A5049630564
Low-power linear computation using nonlinear ferroelectric tunnel junction memristors
2020 · Radu Berdan, Takao Marukame, et al. · Nature Electronics · 244
First demonstration and performance improvement of ferroelectric HfO2-based resistive switch with low operation current and intrinsic diode property
2016 · Shosuke Fujii, Yuuichi Kamimuta, et al. · Symposium on VLSI Technology · 113
In-memory Reinforcement Learning with Moderately-Stochastic Conductance Switching of Ferroelectric Tunnel Junctions
2019 · Radu Berdan, Takao Marukame, et al. · Symposium on VLSI Technology · 41
Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) with 4F2 Architecture
2024 · Shosuke Fujii, Tseng Fu Lu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 35
Self-assembled mixed monolayer containing ferrocenylthiol molecules: STM observations and electrochemical investigations
2006 · Shosuke Fujii, Shu Kurokawa, et al. · Electrochimica Acta · 34
HfO2-based FeFET and FTJ for Ferroelectric-Memory Centric 3D LSI towards Low-Power and High-Density Storage and AI Applications
2020 · Masumi Saitoh, Reika Ichihara, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 32
Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part II: Design Guidelines for Device, Array, and Architecture
2019 · Zizhen Jiang, Shengjun Qin, et al. · IEEE Transactions on Electron Devices · 32
Scaling the CBRAM Switching Layer Diameter to 30 nm Improves Cycling Endurance
2017 · Shosuke Fujii, Jean Anne C. Incorvia, et al. · IEEE Electron Device Letters · 26
Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part I: Accurate and Computationally Efficient Modeling
2019 · Shengjun Qin, Zizhen Jiang, et al. · IEEE Transactions on Electron Devices · 25
Performance Maximization of In-Memory Reinforcement Learning with Variability-Controlled Hf1-xZrxO2 Ferroelectric Tunnel Junctions
2019 · K. Ota, M. Yamaguchi, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 24
A New Method to Extract the Charge Centroid in the Program Operation of Metal–Oxide–Nitride–Oxide–Semiconductor Memories
2010 · Shosuke Fujii, Naoki Yasuda, et al. · Japanese Journal of Applied Physics · 20
Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memory
2018 · Marina Yamaguchi, Shosuke Fujii, et al. · IEEE International Reliability Physics Symposium proceedings · 19
Selector Requirements for Tera-Bit Ultra-High-Density 3D Vertical RRAM
2018 · Zizhen Jiang, Shengjun Qin, et al. · Symposium on VLSI Technology · 16
Improvement of erase-retention trade-off in metal–oxide–nitride–oxide–silicon memories by control of nitrogen profile in SiN charge-trapping layer
2014 · Shosuke Fujii, Haruka Kusai, et al. · Japanese Journal of Applied Physics · 13
Improved State Stability of HfO2 Ferroelectric Tunnel Junction by Template-Induced Crystallization and Remote Scavenging for Efficient in-Memory Reinforcement Learning
2020 · Shosuke Fujii, Marina Yamaguchi, et al. · Symposium on VLSI Technology · 12
Highly Scalable Horizontal Channel 3-D NAND Memory Excellent in Compatibility With Conventional Fabrication Technology
2013 · Kiwamu Sakuma, Haruka Kusai, et al. · IEEE Electron Device Letters · 11
Ferroelectric Tunnel Junction
2019 · Shosuke Fujii, Masumi Saitoh · Elsevier eBooks · 10
Interface State in Metal–Oxide–Nitride–Silicon Memories Induced by Hole Injection during Program/Erase Cycle Stress
2012 · Shosuke Fujii, Ryota Fujitsuka, et al. · Japanese Journal of Applied Physics · 10
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Direct Measurement of Back-Tunneling Current during Program/Erase Operation of Metal–Oxide–Nitride–Oxide–Semiconductor Memories and Its Dependence on Gate Work Function
2010 · Jun Fujiki, Shosuke Fujii, et al. · Japanese Journal of Applied Physics · 10
First Thorough Assessment of Time-Dependent Dielectric Breakdown in Sub-25 nm Gate-All-Around Vertical Ingazno Transistor for 4F 2 DRAM Application
2025 · Akinori Kamiyama, Shoichi Kabuyanagi, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 9
Variability-Controlled HfZrO2 Ferroelectric Tunnel Junctions for Reservoir Computing
2022 · K. Ota, M. Yamaguchi, et al. · IEEE Transactions on Electron Devices · 9
Transition of erase mechanism for MONOS memory depending on SiN composition and its impact on cycling degradation
2010 · Shosuke Fujii, Jun Fujiki, et al. · IEEE International Reliability Physics Symposium proceedings · 9
A Vertical Channel-All-Around FeFET with Thermally Stable Oxide Semiconductor Achieving High ΔIon> 2µA/cell for 3D Stackable 4F2 High Speed Memory
2024 · Shoichi Kabuyanagi, Takamasa Hamai, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 8
Ag Ionic Memory Cell Technology for Terabit-Scale High-Density Application
2019 · Shosuke Fujii, Reika Ichihara, et al. · Symposium on VLSI Technology · 8
Charge Trapping and Reliability Properties of MONOS Memory with High-k Blocking Layer
2011 · Naoki Yasuda, Shosuke Fujii, et al. · ECS Transactions · 8
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Works count: 86
Citation count: 843
H-index: 13
I10-index: 20
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