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Christophe Layer

A Reconfigurable Recurrent Bitonic Sorting Network for Concurrently Accessible Data
2004 · Christophe Layer, Hans-Jörg Pfleiderer · Lecture notes in computer science · 17
A joint reflectometry-optimization algorithm for mapping the topology of an unknown wire network
2017 · Moussa Kafal, Jaume Benoit, et al. · Proceedings of IEEE Sensors/Proceedings of IEEE Sensors ... · 13
A scalable compact architecture for the computation of integer binary logarithms through linear approximation
2004 · C. Layer, H.-J. Pfleiderer, et al. · IEEE International Symposium on Circuits and Systems proceedings · 11
Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA
2007 · Christophe Layer, Daniel Schaupp, et al. · IEEE International Symposium on Circuits and Systems proceedings · 10
Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps
2017 · Marcelino Seif, Emna Farjallah, et al. · IEEE European Test Symposium (ETS) · 9
The POWER7 Binary Floating-Point Unit
2011 · Maarten Boersma, Michael Kroner, et al. · IEEE Symposium on Computer Arithmetic (ARITH) · 9
Enhancing the Spatial Resolution for Wire Fault Detection Systems Using Multi-Carrier Signals
2018 · Esteban Cabanillas, Christophe Layer, et al. · IEEE Sensors Journal · 6
Microsecond intermittent fault detection for wire and connector defect prognostics
2017 · Fabrice Auzanneau, Christophe Layer · Proceedings of IEEE Sensors/Proceedings of IEEE Sensors ... · 6
Using quadrature modulation for precise fault location over wired communication channels
2017 · Christophe Layer, Esteban Cabanillas, et al. · IEEE International New Circuits and Systems Conference (NEWCAS) · 6
Compressed signal acquisition in wire diagnostic
2017 · Tzila Ajamian, Said Moussaoui, et al. · Proceedings of IEEE Sensors/Proceedings of IEEE Sensors ... · 5
On the phase analysis of multi-carrier signals for high-precision fault detection by reflectometry
2017 · Esteban Cabanillas, Christophe Layer, et al. · Proceedings of IEEE Sensors/Proceedings of IEEE Sensors ... · 5
Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories
2016 · Christophe Layer, Laurent Becker, et al. · ACM Journal on Emerging Technologies in Computing Systems · 5
Nonvolatile runtime-reconfigurable FPGA secured through MRAM-based periodic refresh
2013 · Olivier Goncalves, Guillaume Prenat, et al. · IEEE International Memory Workshop (IMW) · 5
Automated phase offset correction using reflectometry in fault detection systems
2017 · Esteban Cabanillas, Christophe Layer · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 4
Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC
2015 · Christophe Layer, Kotb Jabeur, et al. · IEEE Computer Society Annual Symposium on VLSI · 3
Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks
2015 · Christophe Layer, Kotb Jabeur, et al. · IEEE International New Circuits and Systems Conference (NEWCAS) · 2
Magnetic memories: From DRAM replacement to ultra low power logic chips
2014 · G. Prenat, G. Di Pendina, et al. · Design, Automation, and Test in Europe · 2
A coprocessor for fast searching in large databases: Associative Computing Engine
2007 · Layer, Christophe · OPen Access Repositorium der Universität Ulm (OPARU) (Ulm University) · 2
Efficient Hardware Search Engine for Associative Content Retrieval of Long Queries in Huge Multimedia Databases
2005 · C. Layer, H.-J. Pfleiderer · IEEE International Conference on Multimedia and Expo (ICME) · 1
High Performance Associative Coprocessor Architecture for Advanced Database Searching.
2004 · Christophe Layer, Hans-Jörg Pfleiderer · 1
Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories
2016 · Layer, Christophe, Javerliac, Virgile, et al. · HAL
Register Having Non-volatile Memory for Backing up and Restoring Volatile Memory
2014 · Paoli, Pierre, Javerliac, Virgile, et al. · HAL
Magnetic memories: from DRAM replacement to ultra low power logic chips
2014 · Guillaume Prenat, Grégory Di Pendina, et al. · Design, Automation, and Test in Europe
Magnetic memories: From DRAM replacement to ultra low power logic chips
2014 · G. Prenat, G. Di Pendina, et al. · Design, Automation, and Test in Europe
Hardware implementation of an approximate string matching algorithm using bit parallel processing for text information retrieval systems
2006 · C. Layer, H. Peiderer · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems
Works count: 29
Citation count: 122
H-index: 6
I10-index: 4
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