Get started
Author

Shahram Modanlou

Observed name: Shahram modanlou
ORCID: 0000-0002-4586-7850
Observed ORCID: 0000-0002-4586-7850
OpenAlex ID: A5050743592
Analysis and design of a low jitter delay‐locked loop using lock state detector
2021 · Shahram Modanlou, Gholamreza Ardeshir, et al. · International Journal of Circuit Theory and Applications · 7
Designing a time-to-digital converter using quantum-dot cellular automata nanotechnology
2025 · Shahram Modanlou, Mohammad Gholami · Scientific Reports · 6
PDF
Design and analysis of high linearity mixer using subharmonic technique
2018 · Shahram Modanlou, Hossein Miar‐Naimi, et al. · International Journal of Circuit Theory and Applications · 6
A low power and jitter delay cell with pulse width modulation for wide range delay lock loops
2021 · Shahram Modanlou, G. Ardeshir, et al. · Microelectronics Journal · 5
A general jitter analysis of DLL considering the jitter accumulation effect of loop capacitor
2023 · Shahram Modanlou, Gholamreza Ardeshir, et al. · Microprocessors and Microsystems · 2
Amplitude Control Loop to Compensate for I/Q Mismatch in an Accurate Quadrature LC Oscillator
2023 · Hojat Ghonoodi, Mahsa Hadjmohammadi, et al. · Journal of Circuits Systems and Computers · 1
Using tail current phase shift technique to improve locking range injection‐locked frequency divider
2023 · Hojat Ghonoodi, Shahram Modanlou, et al. · International Journal of Circuit Theory and Applications · 1
A High-Performance Time-to-Digital Converter in QCA Technology Employing a Low-Power D Flip-Flop
2025 · Shahram Modanlou, Mohammad Gholami · IEEE Access
Works count: 8
Citation count: 28
H-index: 4
I10-index:
Year
Topic
Type